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HM63921 Datasheet

Part Number HM63921
Manufacturers ETC
Logo ETC
Description 2048-word x 9-bit CMOS Parallel In-Out FIFO Memory
Datasheet HM63921 DatasheetHM63921 Datasheet (PDF)

HM63921 Series 2048-word × 9-bit CMOS Parallel In-Out FIFO Memory The HM63921 is a first-in, first-out memory that utilizes a high performance static RAM array with internal algorithm that controls, monitors and declares status of the memory by empty flag, full flag and half-full flag, to prevent data overflow or underflow. Expansion logic warrants unlimited expansion capability in width and depth. Both read and write are independent from each other and their corresponding pointers are designed .

  HM63921   HM63921






2048-word x 9-bit CMOS Parallel In-Out FIFO Memory

HM63921 Series 2048-word × 9-bit CMOS Parallel In-Out FIFO Memory The HM63921 is a first-in, first-out memory that utilizes a high performance static RAM array with internal algorithm that controls, monitors and declares status of the memory by empty flag, full flag and half-full flag, to prevent data overflow or underflow. Expansion logic warrants unlimited expansion capability in width and depth. Both read and write are independent from each other and their corresponding pointers are designed to select the proper locations out of the entire array serially without address information to load or unload data. Data is toggled in and out of the device through the use of the write enable (W) and read enable (R) pins. The device has a read/write cycle time of 30/35/45 ns. Organization of HM63921 provides a 9-bit data bus. The ninth bit could be used for control or parity for error checking at the option of the user. The HM63921 is fabricated using the Hitachi CMOS 1.3 micron technology. The device is available in DIP and SOJ. Pin Arrangement W D8 D3 D2 D1 D0 XI FF Q0 Q1 Q2 Q3 Q8 VSS 1 2 3 4 5 6 7 8 9 10 11 12 13 14 28 27 26 25 24 23 22 21 20 19 18 17 16 15 VCC D4 D5 D6 D7 FL/RT RS EF XO/HF Q7 Q6 Q5 Q4 R (Top view) Features • • • • • • • • • • First-in, first-out dual port memory 2 k × 9 organization Low-power CMOS 1.3 micron technology Asynchronous and simultaneous read and write Fully expandable in depth and/or width Single 5 V power supply Empty and full warning flags Half-fu.


2005-03-26 : HYB3116160BSJ    HYB3116160BSJ-50    HYB3116160BSJ-60    HYB3116160BSJ-70    HYB3116160BST-50    HYB3116160BST-60    HYB3116160BST-70    HYB3116400BJ-50    HYB3116400BJ-60    HYB3116400BJ-70   


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