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HMC-C061

Analog Devices

DOUBLE-EDGE TRIGGERED D-TYPE FLIP-FLOP MODULE

v02.0711 HMC-C061 50 Gbps, DOUBLE-EDGE TRIGGERED D-TYPE FLIP-FLOP MODULE HIGH SPEED LOGIC 6 6-1 Typical Applications...


Analog Devices

HMC-C061

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Description
v02.0711 HMC-C061 50 Gbps, DOUBLE-EDGE TRIGGERED D-TYPE FLIP-FLOP MODULE HIGH SPEED LOGIC 6 6-1 Typical Applications The HMC-C061 is ideal for: OC-768 and SDH STM-256 Equipment Serial Data Transmission up to 50 Gbps Short, intermediate, and long haul fiber optic applications Broadband Test and Measurement Functional Diagram Features Supports data rates 50 Gbps Half Rate Clock Input (1 MHz - 25 GHz) Inputs Terminated Internally in 50 ohms Supports Single-Ended or Differential Operation Very Low Power Consumption: 690 mW Less than 200 fs Additive RMS Jitter Fast Rise and Fall Times: <10ps Single -3.3 V Power Supply Hermetically Sealed Module: 1.85mm connectors -40°C to +70°C Operating Temperature General Description The HMC-C061 is a double edge triggered D-type FlipFlop (DETDFF) designed to support data transmission rates of up to 50 Gbps. The device operates at half the sampling frequency of the applied data rate. The maximum clock rate is 25 GHz for 50 Gbps input data. The clock input is broadband from DC to 25 GHz. During normal operation, data is transferred to the outputs on both the positive edge and the negative edge of the clock. All input signals to the HMC-C061 are terminated with 50 Ohms to ground on-chip, and may be either AC or DC coupled. The differential outputs of the HMC-C061 may be either AC or DC coupled. Outputs can be connected directly to a 50 Ohm to ground terminated system, while DC blocking capacitors may be used if the terminating system ...




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