Generator. HMC1035LP6GE Datasheet

HMC1035LP6GE Datasheet PDF

Part HMC1035LP6GE
Description Clock Generator
Feature Clock Generators - SMT HMC1035LP6GE v02.0614 High Performance, +3.3 V Clock Generator 25 - 2500 MHz.
Manufacture Analog Devices
Datasheet
Download HMC1035LP6GE Datasheet





HMC1035LP6GE
HMC1035LP6GE
v02.0614
High Performance, +3.3 V Clock Generator
25 - 2500 MHz
Typical Applications
10G/40G/100G Optical Modules, Transponders,
Line Cards
OTN and SONET/SDH Applications
Data Converters, Sample Clock Generation
Cellular/4G Infrastructure
High Frequency Processor/FPGA Clocks
Any Frequency Clock Rate Generation
Low Jitter SAW Oscillator Replacement
DDS Replacement
Frequency Translation
Frequency Margining
Functional Diagram
Features
3.3 V Only, Single Supply Rail Operation
Output Frequency Range: 25 MHz - 2500 MHz
Integer or Fractional-N mode Frequency Translation
Configurable LVDS-compatible or LVPECL type
Differential Outputs
“Power Priority” and“Performance Priority” modes
97 fs RMS Jitter Generation (12 kHz - 20 MHz,
2500 MHz, Typ)
-163 dBc/Hz Phase Noise Floor to Improve ADC/DAC
SNR (maximum output swing levels).
Adjustable PLL Loop BW via External Filter
Output Disable/Mute Control
Lock Detect Signal
Exact Frequency Mode to achieve reference
frequency tuning, and 0 Hz frequency error
40 Lead 6x6 mm SMT Package: 36 mm2
InfoFrmoartiopnrfiucrneis,heddeblyivAenraylogaDnedvicteos ips lbaelcieevedortodbeersac:cHuraittetiatned Mreliiacbrleo. wHoawveeverC, noorpoForar tpioricne,, 2deElilviezrayb, aentdh tDo rpivlaec,eCohrdeelrms:sAfonardlo,gMDAevi0ce1s8,2In4c.,
1
responsibility
rights of third
pisaartsiessumtheadt mbyaPyArhneasoluonlgt feDro:emv9icit7ess8ufso-er2.itS5spu0esc-eif3,icn3aotri4ofno3sr
asnuybjienFcfrtaintoxgec:mh9aenn7gts8e ow-f2ipth5aotue0tn-nts3ooti3cr eo7.th3Neor
lTicraednesemaisrkgsraanndtedregbiysteimrepdlictraatdioenmoarrkosthaerArewtpihseeppulrniocdpeearrttyainooyfntphaeStier nuret spoprpepcoativtreetn:ot wrPignehhrtsso. onf eA:na9lo7g 8De-v2ic5es0.
-
OOnredTeerchOnnol-olginyeWaayt,wP.wO.wB.ohxit9t1it0e6.,cNoomrwood, MA 02062-9106
3PA3hp4op3nliec:ao7tri8o1na-S3p2up9ps-p4@o7r0ht:0iPtthiOtoenr.dec:eo1r -mo8n0li0n-eAaNtAwLwOwG.-aDnalog.com



HMC1035LP6GE
HMC1035LP6GE
v02.0614
High Performance, +3.3 V Clock Generator
25 - 2500 MHz
General Description
The HMC1035LP6GE is a low-noise, wide-band 3.3 V clock generator IC with a fractional-N Phase Locked Loop
(PLL) that features an integrated Voltage Controlled Oscillator (VCO). The device provides differential clock outputs
between 25 MHz and 2500 MHz range. The HMC1035LP6GE features a low noise Phase Detector (PD) and
Delta-Sigma modulator, capable of operating at up to 100 MHz which permits wider loop-bandwidths and excellent
spurious performance.
The HMC1035LP6GE features industry leading phase noise and jitter performance, across the operating range,
that enable it to improve link level jitter performance, Bit-Error-Rates (BER) and eye diagram metrics. The superior
noise floor (<-162 dBc/Hz) makes the HMC1035LP6GE an ideal source for a variety of applications –such as clock
references for high speed data converters, physical layer devices (PHY), serializer/deserializer (SERDES) circuits,
FPGAs and processors. The HMC1035LP6GE can also be used as an LO for 10G/40G/100G optical modules
and transponders, as well as primary reference clock for 10G/40G/100G line cards, and for jitter attenuation and
frequency translation.
The differential output of the HMC1035LP6GE can be set to either External Termination, which could be used for
LVPECL operation, or Internal Termination for operation in an LVDS compatible mode or LVPECL, see Figure 18.
Additionally, an ouput swing adjustment makes the device flexible and compatible with a wide variety of signal level
requirements. The output can be internally terminated to reduce component count and cost or could be terminated
externally using standard LVPECL termination methods such as Figure 21. An Output Mute function allows the user
to shut off the outputs, such as may be required for board testing or debugging. The LVPECL/LVDS, amplitude
select and Output Mute function are all programmed SPI serial programming
The HMC1035LP6GE is designed to select between a Power Priority or a Performance Priority mode. The Power
Priority setting reduces the current consumption of the part, whereas the Performance Priority setting improves the
Jitter and Phase Noise performance.
The 24 bit Delta-Sigma Modulator further enhances Hittite’s Exact Frequency Mode, which enables users to
generate output frequencies with 0 Hz frequency error in many applications.
InfoFrmoartiopnrfiucrneis,heddeblyivAenraylogaDnedvicteos ips lbaelcieevedortodbeersac:cHuraittetiatned Mreliiacbrleo. wHoawveeverC, noorpoForar tpioricne,, 2deElilviezrayb, aentdh tDo rpivlaec,eCohrdeelrms:sAfonardlo,gMDAevi0ce1s8,2In4c.,
responsibility
rights of third
pisaartsiessumtheadt mbyaPyArhneasoluonlgt feDro:emv9icit7ess8ufso-er2.itS5spu0esc-eif3,icn3aotri4ofno3sr
asnuybjienFcfrtaintoxgec:mh9aenn7gts8e ow-f2ipth5aotue0tn-nts3ooti3cr eo7.th3Neor
lTicraednesemaisrkgsraanndtedregbiysteimrepdlictraatdioenmoarrkosthaerArewtpihseeppulrniocdpeearrttyainooyfntphaeStier nuret spoprpepcoativtreetn:ot wrPignehhrtsso. onf eA:na9lo7g 8De-v2ic5es0.
-
OOnredTeerchOnnol-olginyeWaayt,wP.wO.wB.ohxit9t1it0e6.,cNoomrwood, MA 02062-9106
Phone: 781-329-4700 • Order online at www.analog.com
3A3p4p3licaotrionaSpuppsp@orht:iPtthitoen.ec: o1-m800-ANALOG-D
2




@ 2014 :: Datasheetspdf.com ::
Semiconductors datasheet search & download site (Privacy Policy & Contact)