HMU17GM-45883

HMU17/883 October 1997 16 x 16-Bit CMOS Parallel Multiplier Description The HMU17/883 is a high speed, low power CMOS 16 x 16-bit parallel multiplier ideal for fast, real time digital signal processing applications. The 16-bit X and Y operands may be independently specified as either two’s complement or unsigned magnitude format, thereby allowing mixed mode multiplication operations. Additional inputs are provided to accommodate format adjustment and rounding of the 32-bit product. The Format Adjust control allows the user the option of selecting a 31-bit product with the sign bit replicated LSP. The Round control is provided to accommodate rounding of the most significant portion of the result. This is accomplished by adding one to the most significant bit of the LSP. Two 16-bit output registers (MSP and LSP) are provided to hold the most and least significant portions of the result, respectively. These registers may be made transparent for asynchronous operation through the use of the Feedthrough Control (FT). The two halves of the product may be routed to a single 16-bit threestate output port via the output multiplexer control, and in addition, the LSP is connected to the Y-input port through a separate three-state buffer. The HMU17/883 utilizes a single clock signal (CLK) along with three register enables (ENX, ENY, and ENP) to latch the input operands and the output product registers. The ENX and ENY inputs enable the X and Y input registers, while ENP enables both the LSP...