HS-82C12RH
March 1996
Radiation Hardened 8-Bit Input/Output Port
Functional Diagram
DS1 DS2 STB CLR MD DATA LATCH AND B...
HS-82C12RH
March 1996
Radiation Hardened 8-Bit Input/Output Port
Functional Diagram
DS1 DS2 STB CLR MD DATA LATCH AND BUFFER (8) CONTROL AND DEVICE SELECT LOGIC 2 SERVICE REQUEST F.F.
Features
Devices QML Qualified in Accordance with MIL-PRF-38535 Detailed Electrical and Screening Requirements are Contained in SMD# 5962-95818 and Intersil’ QM Plan - Radiation Hardened
CMOS Process - Total Dose 1 x 105 RAD (Si) - Transient Upset > 1 x 108 RAD (Si)/s - Latch-Up Immune EPI-
CMOS > 1 x 1012 RAD (Si)/s Low Power Dissipation High Noise Immunity Single Power Supply +5V Low Input Load Current 8-Bit Data Register and Buffer Asynchronous Register Clear Service Request Flip-Flop for Interrupt Generation Three-State Outputs Bus-Compatible with HS-80C85RH CPU Electrically Equivalent to Sandia SA3026 Military Temperature Range -55oC to +125oC
INT
3
DI0-7
DO0-7
Pin Description
PIN DI0-DI7 DO0-DO7 DS1, DS2 MD STB INT CLR Data In Data Out Device Select Mode Strobe Interrupt Clear DESCRIPTION
Description
The Intersil HS-82C12RH is a radiation hardened 8-bit input/ output port designed for use with the HS-80C85RH radiation hardened microprocessor. It is manufactured using a selfaligned, junction-isolated EPI-
CMOS process and features three-state output buffers and device selection and control logic. A service request flip-flop is included for the generation and control of interrupts to the microprocessor. The device can be used in implement many of the peripheral a...