LOW SKEW, 1-TO-12 DIFFERENTIALTO-LVCMOS/LVTTL FANOUT BUFFER
General Description
The ICS83948I is a low skew, 1-to-12 ICS...
LOW SKEW, 1-TO-12 DIFFERENTIALTO-LV
CMOS/LVTTL FANOUT BUFFER
General Description
The ICS83948I is a low skew, 1-to-12 ICS Differential-to-LV
CMOS/LVTTL Fanout Buffer and HiPerClockS™ a member of the HiPerClockS™ family of High
Performance Clock Solutions from IDT. The ICS83948I has two selectable clock inputs. The CLK, nCLK pair can accept most standard differential input levels. The LV
CMOS_CLK can accept LV
CMOS or LVTTL input levels. The low impedance LV
CMOS/LVTTL outputs are designed to drive 50 series or parallel terminated transmission lines. The effective fanout can be increased from 12 to 24 by utilizing the ability of the outputs to drive two series terminated lines.
The ICS83948I is characterized at full 3.3V core/3.3V output. Guaranteed output and part-to-part skew characteristics make the ICS83948I ideal for those clock distribution applications demanding well defined performance and repeatability.
ICS83948I
Features
Twelve LV
CMOS/LVTTL outputs Selectable differential CLK/nCLK or LV
CMOS/LVTTL clock
input
CLK/nCLK pair can accept the following differential
input levels: LVPECL, LVDS, LVHSTL, SSTL, HCSL
LV
CMOS_CLK supports the following input types: LV
CMOS,
LVTTL
Maximum output frequency: 250MHz Output skew: 350ps (maximum) Part-to-part skew: 1.5ns (maximum) 3.3V core, 3.3V output -40°C to 85°C ambient operating temperature Available in both standard (RoHS 5) and lead-free (RoHS 6)
packages
Block Diagram
CLK_EN Pullup
LV
CMOS_CLK Pullup CLK Pullup...