ICS950810

Integrated Circuit Systems, Inc. ICS950810 Frequency Generator with 200MHz Differential CPU Clocks Recommended Application: CK-408 clock for BANIAS processor/ ODEM and MONTARA-G chipsets. Output Features: 3 Differential CPU Clock Pairs @ 3.3V 7 PCI (3.3V) @ 33.3MHz 3 PCI_F (3.3V) @ 33.3MHz 1 USB (3.3V) @ 48MHz 1 DOT (3.3V) @ 48MHz 1 REF (3.3V) @ 14.318MHz 5 3V66 (3.3V) @ 66.6MHz 1 VCH/3V66 (3.3V) @ 48MHz or 66.6MHz Features: Supports spread spectrum modulation, down spread 0 to -0.5%. (CPU, 3V66, PCI) Efficient power management scheme through PD#, CPU_STOP# and PCI_STOP#. Key Specifications: CPU Output Jitter <150ps 3V66 Output Jitter <250ps CPU Output Skew <100ps Pin Configuration VDDREF X1 X2 GND PCICLK_F0 PCICLK_F1 PCICLK_F2 VDDPCI GND PCICLK0 PCICLK1 PCICLK2 PCICLK3 VDDPCI GND PCICLK4 PCICLK5 PCICLK6 VDD3V66 GND 3V66_2 3V66_3 3V66_4 3V66_5 *PD# VDDA GND Vtt_PWRGD# 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 56 55 54 53 52 51 50 49 48 47 46 45 44 43 42 41 40 39 38 37 36 35 34 33 32 31 30 29 REF FS1 FS0 CPU_STOP#* CPUCLKT0 CPUCLKC0 VDDCPU CPUCLKT1 CPUCLKC1 GND VDDCPU CPUCLKT2 CPUCLKC2 MULTSEL0* IREF GND FS2 48MHz_USB 48MHz_DOT VDD48 GND 3V66_1/VCH_CLK PCI_STOP#* 3V66_0 VDD3V66 GND SCLK SDATA 56-Pin 300mil SSOP 6.10 mm. Body, 0.50 mm. pitch TSSOP * These inputs have 150K internal pull-up resistor to VDD. Block Diagram PLL2 48MHz_USB 48MHz_DOT Functionality FS2 FS1 FS0 X 0 0 1 1 0 0 1 1 0 1 0 1 0 1 0 1 CPU (MHz) 1...