ICS952011

www.DataSheet4U.com Integrated Circuit Systems, Inc. ICS952011 Programmable Timing Control Hub™ for P4™ processor Recommended Application: SIS 645/645DX/648/650 style chipsets. Output Features: 2 - Pairs of differential CPUCLKs (differential current mode) 1 - SDRAM @ 3.3V 9 - PCI @3.3V (including 2 free-running) 2 - AGP @ 3.3V 2 - ZCLKs @ 3.3V 1- 12/48MHZ @ 3.3V 1- 24/48MHz, @3.3V selectable by I2C 3- REF @3.3V, 14.318MHz. Key Specifications: PCI - PCI output skew: < 500ps CPU - SDRAM output skew: < 1ns AGP - AGP output skew: <150ps Features/Benefits: Selectable asynchronous/synchronous AGP, ZCLK and PCI outputs Supports DDR333 OEM frequencies Programmable output frequency, divider ratios, output rise/falltime, output skew. Programmable spread percentage for EMI control. Watchdog timer technology to reset system if system malfunctions. Programmable watch dog safe frequency. Support I2C Index read/write and block read/write operations. For PC133 SDRAM system use the ICS9179-16 as the memory buffer. For DDR SDRAM system use the ICS93735 or ICS93732 as the memory buffer. Uses external 14.318MHz crystal. Functionality Bit2 FS4 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 Bit7 FS3 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1 Bit6 FS2 0 0 0 0 1 1 1 1 0 0 0 0 1 1 1 1 0 0 0 0 1 1 1 1 0 0 0 0 1 1 1 1 Bit5 FS1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 Bit4 FS0 0 1 0 1 0 1 0 1 0 1 0...