ICS952702

Integrated Circuit Systems, Inc. ICS952702 Programmable Timing Control Hub for K7TM System Recommended Application: SiS746/746FX style chipset Output Features: 1 - Pair of differential open drain CPU outputs 1 - Single-ended open drain CPU output 8 - PCICLK @ 3.3V including 2 PCI clock free running 2 - AGPCLK @ 3.3V 3 - REF @ 3.3V 2 - ZCLK @ 3.3V 2 - IOAPIC @ 2.5V 1 - 12_48MHz @ 3.3V 1 - 24_48MHz @ 3.3V Key Specifications: CPU Output Jitter <250ps AGP Output Jitter <250ps ZCLK Output Jitter <250ps PCI Output Jitter <500ps CPU-AGP/PCI/ZCLK skew: 2.5ns~3.5ns Pin Configuration VDDREF 1 **FS0/REF0 2 **FS1/REF1 3 **FS4/REF2 4 GNDREF 5 X1 6 X2 7 GNDZ 8 ZCLK0 9 ZCLK1 10 VDDZ 11 *PCI_STOP# 12 VDDPCI 13 **FS2/PCICLK_F0 14 *FS3/PCICLK_F1 15 PCICLK0 16 PCICLK1 17 GNDPCI 18 VDDPCI 19 PCICLK2 20 PCICLK3 21 PCICLK4 22 PCICLK5 23 GNDPCI 24 48 VDDLAPIC 47 IOAPIC1 46 IOAPIC0 45 GNDAPIC 44 CPU_STOP#* 43 CPUCLKODT1 42 RESET# 41 GNDCPU 40 CPUCLKODT0 39 CPUCLKODC0 38 VDDCPU 37 AGND 36 AVDD 35 SCLK 34 SDATA 33 PD#* 32 GNDAGP 31 AGPCLK0 30 AGPCLK1 29 VDDAGP 28 AVDD48 27 12_48MHz/SEL12#_48MHz* 26 24_48MHz/SEL24#_48MHz** 25 GND48 Features/Benefits: Selectable synchronous/asynchronous AGP/PCI frequency Programmable output frequency. Programmable output divider ratios. Programmable output rise/fall time. Programmable output skew. Programmable spread percentage for EMI control. Watchdog timer technology to reset system if system malfunctions. Programmable w...