Clock Driver
ICS95V8 5 7 C
2.5V Wide Range Frequency Clock Driver (45MHz - 233MHz)
Recommended Application: • DDR Memory Modules / ...
Description
ICS95V8 5 7 C
2.5V Wide Range Frequency Clock Driver (45MHz - 233MHz)
Recommended Application: DDR Memory Modules / Zero Delay Board Fan Out Provides complete DDR registered DIMM solution
with ICSSSTVF16857, ICSSSTVF16859 or ICSSSTV32852
Product Description/Features: Low skew, low jitter PLL clock driver 1 to 10 differential clock distribution (SSTL_2) Feedback pins for input to output synchronization PD# for power management Spread Spectrum-tolerant inputs Auto PD when input signal removed
Specifications: Meets PC3200 Class A+ specification for DDR-I 400
support Covers all DDRI speed grades
Switching Characteristics: CYCLE - CYCLE jitter: <50ps OUTPUT - OUTPUT skew: <40ps Period jitter: ±30ps
Pin Configuration
GND CLKC0 CLKT0
VDD CLKT1 CLKC1
GND GND CLKC2 CLKT2 VDD VDD CLK_INT CLK_INC VDD AVDD AGND GND CLKC3 CLKT3 VDD CLKT4 CLKC4 GND
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24
ICS95V857C
48 GND 47 CLKC5 46 CLKT5 45 VDD 44 CLKT6 43 CLKC6 42 GND 41 GND 40 CLKC7 39 CLKT7 38 VDD 37 PD# 36 FB_INT 35 FB_INC 34 VDD 33 FB_OUTC 32 FB_OUTT 31 GND 30 CLKC8 29 CLKT8 28 VDD 27 CLKT9 26 CLKC9 25 GND
48-Pin TSSOP/TVSOP
6.10 mm Body, 0.50 mm Pitch = TSSOP 4.40 mm Body, 0.40 mm Pitch = TVSOP
Block Diagram
Functionality
INPUTS AVDD PD# CLK_INT
OUTPUTS CLK_INC CLKT CLKC FB_OUTT FB_OUTC
PLL State
GND H
L
H LH L
H Bypassed/off
GND
2.5V (nom)
2.5V (nom)
2.5V (nom)
2.5V (nom)
2.5V (nom)
H L L H H X
HL LH HL LH HL
<20MHz)(1)
HL ZZ ZZ...
Similar Datasheet