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ICS9LPRS436C

Integrated Device Technology

Low Power Clock

DATASHEET Low Power Clock for Intel Atom®-Based Systems Recommended Application: NM10 Express Chipset + N450/D410/D510 ...


Integrated Device Technology

ICS9LPRS436C

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Description
DATASHEET Low Power Clock for Intel Atom®-Based Systems Recommended Application: NM10 Express Chipset + N450/D410/D510 Atom® CPUs Output Features: 2 - 0.8V push-pull differential CPU pairs 2 - 0.8V push-pull differential PCIEX pairs 1 - 0.8V push-pull differential SATA75 pair 1 - 0.8V push-pull differential DOT96 pair 1 - 0.8V push-pull differential CPU/PCIEX selectable pair 1 - PCI (33MHz) 1 - PCICLK_F, (33MHz) free-running 1 - USB, 48MHz 1 - 12/48MHz 1 - 25MHz 1 - REF, 14.318MHz 1 - 12.288MHz ICS9LPRS436C Key Specifications: CPU outputs cycle-cycle jitter < 85ps PCIEX outputs cycle-cycle jitter < 125ps SATA outputs cycle-cycle jitter < 125ps PCI outputs cycle-cycle jitter < 500ps +/- 100ppm frequency accuracy on all clocks Features/Benefits: VDDSUSP allows 25MHz to run in S-states Supports programmable spread percentage Uses external 25MHz crystal, external crystal load caps are required for frequency tuning PEREQ# pins to support PCIEX/SATA power management. Low power differential clock outputs (No 50Ω resistor to GND needed) Integrated 33Ω series resistor on all differential outputs. Pin Configuration **FS3/12_288M_2x VDD12_288 PEREQ1# PEREQ2# **FS4/PCICLK0_2x GND VDDPCI **ITP_EN/PCICLK_F0_2x PEREQ3# *SEL12_48#/12_48MHz_2x VDD FSLA/USB48_2x GND DOTT_96MHzLR DOTC_96MHzLR FSLB GNDSATA SATAT_LR/PCIeT_LR3 SATAC_LR/PCIeC_LR3 VDDSATA PCIeT_LR0 PCIeC_LR0 PCIeT_LR1 PCIeC_LR1 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22...




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