IDQS3

,'46 ® $0,+*  PLFURQ &026 *DWH $UUD\ Description IDQS3 is a crystal oscillator input receiver pad piece. QC is a non-inverting, CMOS-level schmitt trigger clock input buffer. QO is the output to the ODQFE01M. PADM is the bond pad from the Xtal-in. Logic Symbol Logic Schematic IDQS3 QC P PADM D QO Truth Table PADM L H QC L H QO L H Xtal-in P D IDQS3 QC E QC E QI QO Pin Loading Load PADM 4.90 pF ODQFE01M Xtal-out HDL Syntax Verilog .................... IDQS3 inst_name (QC, QO, PADM); VHDL...................... inst_name: IDQS3 port map (QC, QO, PADM); Power Characteristics Parameter Static IDD (TJ = 85°C) EQLpd See page 2-15 for power equation. Value TBD 18.0 Units nA Eq-load Pad Logic 4-9 ,'46 ® $0,+*  PLFURQ &026 *DWH $UUD\ Propagation Delays Conditions: TJ = 25°C, VDD = 5.0V, Typical Process Delay (ns) From To Parameter 1 PADM QC tPLH tPHL 1.37 1.02 PADM QO tPLH tPHL 0.00 0.00 Delay will vary with input conditions. See page 2-17 for...