IDT71T75902

1M x 18 2.5V Synchronous ZBT™ SRAM 2.5V I/O, Burst Counter Flow-Through Outputs IDT71T75902 Features ◆ 1M x 18 memory configuration ◆ Supports high performance system speed - 100 MHz (7.5 ns Clock-to-Data Access) ◆ ZBTTM Feature - No dead cycles between write and read cycles ◆ Internally synchronized output buffer enable eliminates the need to control OE ◆ Single R/W (READ/WRITE) control pin ◆ 4-word burst capability (Interleaved or linear) ◆ Individual byte write (BW1 - BW2 control (May tie active) ◆ Three chip enables for simple depth expansion ◆ 2.5V power supply (±5%) ◆ 2.5V (±5%) I/O Supply (VDDQ) ◆ Power down controlled by ZZ input ◆ Boundary Scan JTAG Interface (IEEE 1149.1 Compliant) ◆ Packaged in a JEDEC standard 100-pin plastic thin quad flatpack (TQFP), 119 ball grid array (BGA) ◆ Green parts available, see Ordering Information Functional Block Diagram — 1M x 18 LBO Address A [0:19] CE1, CE2 CE2 R/W CEN ADV/LD BWx DQ DQ 1M x 18 BIT ME...