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IDT72251 Datasheet

Part Number IDT72251
Manufacturers Integrated Device Technology
Logo Integrated Device Technology
Description FIFO memories
Datasheet IDT72251 DatasheetIDT72251 Datasheet (PDF)

CMOS SyncFIFO™ 8192 X 9 Integrated Device Technology, Inc. ADVANCED INFORMATION IDT72251 FEATURES: • • • • • • • • • • • • 8192 x 9-bit organization Pin/function compatible with IDT72421/722x1 family 15 ns read/write cycle time Read and write clocks can be independent Dual-Ported zero fall-through time architecture Empty and Full flags signal FIFO status Programmable Almost-Empty and Almost-Full flags can be set to any depth Programmable Almost-Empty and Almost-Full flags default to Empty+7, a.

  IDT72251   IDT72251






Part Number IDT72251
Manufacturers Renesas
Logo Renesas
Description CMOS SyncFIFO
Datasheet IDT72251 DatasheetIDT72251 Datasheet (PDF)

CMOS SyncFIFO™ IDT72421, IDT72201 64 x 9, 256 x 9, 512 x 9, IDT72211, IDT72221 1,024 x 9, 2,048 x 9, IDT72231, IDT72241 4,096 x 9 and 8,192 x 9 IDT72251 LEAD FINISH (SnPb) ARE IN EOL PROCESS - LAST TIME BUY EXPIRES JUNE 15, 2018 FEATURES: • 64 x 9-bit organization (IDT72421) • 256 x 9-bit organization (IDT72201) • 512 x 9-bit organization (IDT72211) • 1,024 x 9-bit organization (IDT72221) • 2,048 x 9-bit organization (IDT72231) • 4,096 x 9-bit organization (IDT72241) • 8,192 x 9-bit org.

  IDT72251   IDT72251







FIFO memories

CMOS SyncFIFO™ 8192 X 9 Integrated Device Technology, Inc. ADVANCED INFORMATION IDT72251 FEATURES: • • • • • • • • • • • • 8192 x 9-bit organization Pin/function compatible with IDT72421/722x1 family 15 ns read/write cycle time Read and write clocks can be independent Dual-Ported zero fall-through time architecture Empty and Full flags signal FIFO status Programmable Almost-Empty and Almost-Full flags can be set to any depth Programmable Almost-Empty and Almost-Full flags default to Empty+7, and Full-7, respectively Output enable puts output data bus in high-impedance state Advanced submicron CMOS technology Available in 32-pin plastic leaded chip carrier (PLCC) Industrial temperature range (-40oC to +85oC) is available, tested to military electrical specifications DESCRIPTION: The IDT72251 SyncFIFO™ is a very high-speed, lowpower First-In, First-Out (FIFO) memory with clocked read and write controls. The IDT72251 has a 8192 x 9-bit memory array. This FIFO is applicable for a wide variety of data buffering needs such as graphics, local area networks and interprocessor communication. This FIFO has a 9-bit input and output port. The input port is controlled by a free-running clock (WCLK), and two write enable pins (WEN1 , WEN2). Data is written into the Synchronous FIFO on every rising clock edge when the write enable pins are asserted. The output port is controlled by another clock pin (RCLK) and two read enable pins (REN1, REN2). The read clock can be tied to the write cl.


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