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IDT74AHCT373 Datasheet

Part Number IDT74AHCT373
Manufacturers IDT
Logo IDT
Description High Speed CMOS Octal Transparent Latch
Datasheet IDT74AHCT373 DatasheetIDT74AHCT373 Datasheet (PDF)

FEATURES: • Equivalent to ALS speeds and output drive over full temperature and voltage supply extremes • 10ns typical data to output delay • IOL = 14mA over full military temperature range • CMOS power levels (5p.W typo static) • Both CMOS and TTL output compatible • Substantially lower input current levels than ALS (5p.A max.) • Octal transparent latch with enable • 100% product assurance screening to MIL-STD-883, Class B is available • JEDEC standard pinout for DIP and LCC DESCRIPTION: The I.

  IDT74AHCT373   IDT74AHCT373






Part Number IDT74AHCT377
Manufacturers IDT
Logo IDT
Description High Speed CMOS Octal D Flip-Flop
Datasheet IDT74AHCT373 DatasheetIDT74AHCT377 Datasheet (PDF)

FEATURES: • Equivalent to ALS speeds and output drive over full temperature and voltage supply extremes • 10ns typical clock to output • IOL = 14mA over full military temperature range • CMOS power levels (5p.W typo static) • Both CMOS and TTL output compatible • Substantially lower input current levels than ALS (5p.A max.) • Octal D flip-flop with clock enable • 100% product assurance screening to MIL-STD-883, Class B is available • JEDEC standard pinout for DIP and LCC PIN CONFIGURATIONS CE 0.

  IDT74AHCT373   IDT74AHCT373







Part Number IDT74AHCT374
Manufacturers IDT
Logo IDT
Description High Speed CMOS Octal D Register
Datasheet IDT74AHCT373 DatasheetIDT74AHCT374 Datasheet (PDF)

FEATURES: • Equivalent to ALS speeds and output drive over full temperature and voltage supply extremes • 10ns typical address to output delay • IOL = 14mA over full military temperature range • CMOS power levels (5p.W typo static) • Both CMOS and TTL output compatible • Substantially lower input current levels than ALS (5p.A max.) • Octal D register (3-state) • 100% product assurance screening to MIL-STD-833, Class B is available • JEDEC standard pinout for DIP and LCC DESCRIPTION: The IDT54/7.

  IDT74AHCT373   IDT74AHCT373







High Speed CMOS Octal Transparent Latch

FEATURES: • Equivalent to ALS speeds and output drive over full temperature and voltage supply extremes • 10ns typical data to output delay • IOL = 14mA over full military temperature range • CMOS power levels (5p.W typo static) • Both CMOS and TTL output compatible • Substantially lower input current levels than ALS (5p.A max.) • Octal transparent latch with enable • 100% product assurance screening to MIL-STD-883, Class B is available • JEDEC standard pinout for DIP and LCC DESCRIPTION: The IDT54/74AHCT373 are 8-bit latches built using advanced CEMOS'", a dual metal CMOS technology. This octal latch has 3-state output and is intended for bus-oriented applications. The flip-flops appear transparent to the data when Latch Enable (LE) is HIGH. When LE is LOW, the data that meets the setup times is latched. Data appears on the bus when the Output Enable (OE) is LOW. When bE is HIGH, the bus output is in the high impedance state. PIN CONFIGURATIONS De 00 Do 0, 0, 0, 0.


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