FEATURES:
• Equivalent to ALS speeds and output drive over full temperature and voltage supply extremes
• 11 ns typical ...
FEATURES:
Equivalent to ALS speeds and output drive over full temperature and
voltage supply extremes
11 ns typical clock to output IOL = 14mA over full military temperature range
CMOS power levels (5/lW typo static) Both
CMOS and TTL output compatible Substantially lower input current levels than ALS (5/l max.) Octal transparent latch with 3-state output 100% product assurance screening to MIL-STD-883, Class B
is available JEDEC standard pinout for DIP and LCC
DESCRIPTION:
The IDT54/74AHCT533 are octal transparent latches built using advanced CEMOS··, a dual metal
CMOS technology. The IDT54n4AHCT533 consist of eight latches with 3-state outputs for bus organized system applications. The flip-flops appear transparent to the data when Latch Enable (LE) is HIGH. When LE is LOW, the data that meets the setup times is latched. Data apJ'ears on the bus when the Output Enable (OE) is LOW. When OE is HIGH, the bus output is in the high impedance state.
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