IDT74ALVCH16270

IDT74ALVCH16270 3.3V CMOS 12-BIT TO 24-BIT REGISTERED BUS EXCHANGER INDUSTRIAL TEMPERATURE RANGE 3.3V CMOS 12-BIT TO 24-BIT REGISTERED BUS EXCHANGER WITH 3-STATE OUTPUTS AND BUS-HOLD 0.5 MICRON CMOS Technology Typical tSK(o) (Output Skew) < 250ps ESD > 2000V per MIL-STD-883, Method 3015; > 200V using machine model (C = 200pF, R = 0) VCC = 3.3V ± 0.3V, Normal Range VCC = 2.7V to 3.6V, Extended Range www.DataSheet4U.com VCC = 2.5V ± 0.2V CMOS power levels (0.4µ W typ. static) Rail-to-Rail output swing for increased noise margin Available in SSOP, TSSOP, and TVSOP packages IDT74ALVCH16270 FEATURES: DRIVE FEATURES: High Output Drivers: ±24mA Suitable for heavy loads APPLICATIONS: 3.3V high speed systems 3.3V and lower voltage computing systems This registered bus exchanger is built using advanced dual metal CMOS technology. The ALVCH16270 is used in applications in which data must be transferred from a narrow high-speed bus to a wide lower-frequency bus. This device provides synchronous data exchange between the two ports. Data is stored in the internal registers on the low-to-high transition of the clock (CLK) input when the appropriate clock-enable (CLKEN) inputs are low. The select (SEL) line selects 1B or 2B data for the A outputs. For data transfer in the A-to-B direction, a two-stage pipeline is provided in the A-to-1B path, with a single storage register in the A-to-2B path. Proper control of the CLKENA input allows two sequential 12-bit w...