IDT74FCT138AT

Integrated Device Technology, Inc. FAST CMOS 1-OF-8 DECODER WITH ENABLE DESCRIPTION: IDT54/74FCT138T/AT/CT FEATURES: Std., A and C speed grades Low input and output leakage ≤1µA (max.) CMOS power levels True TTL input and output compatibility – VOH = 3.3V (typ.) – VOL = 0.3V (typ.) High drive outputs (-15mA IOH, 48mA IOL) Meets or exceeds JEDEC standard 18 specifications Product available in Radiation Tolerant and Radiation Enhanced versions Military product compliant to MIL-STD-883, Class B and DESC listed (dual marked) Available in DIP, SOIC, QSOP, CERPACK and LCC packages The IDT54/74FCT138T/AT/CT are 1-of-8 decoders built using an advanced dual metal CMOS technology. The IDT54/ 74FCT138T/AT/CT accepts three binary weighted inputs (A0, A1, A2) and, when enabled, provides eight mutually exclusive active LOW outputs (O0-O7). The IDT54/74FCT138T/AT/CT features three enable inputs, two active LOW (E1, E2) and one active HIGH (E3). All outputs will be HIGH unless E1 and E2 are LOW and E3 is HIGH. This multiple enable function allows easy parallel expansion of the device to a 1-of-32 (5 lines to 32 lines) decoder with just four IDT54/74FCT138T/AT/CT devices and one inverter. FUNCTIONAL BLOCK DIAGRAM A2 A1 A0 E1 E2 E3 PIN CONFIGURATIONS A0 A1 A2 E1 E2 E3 O7 GND 1 2 3 4 5 6 7 8 P16-1 D16-1 SO16-1 SO16-7 & E16-1 16 15 14 13 12 11 10 9 VCC O0 O1 O2 O3 O4 O5 O6 2570 drw 02 DIP/SOIC/QSOP/CERPACK TOP VIEW INDEX V CC NC 1 A1 A0 3 2 A2 O7 O6 O5 O4 O3 O2 O1 O...