IDT8SLVP1212I

Low Phase Noise, 1-to-12, 3.3V, 2.5V LVPECL Output Fanout Buffer IDT8SLVP1212I DATASHEET General Description The IDT8SLVP1212I is a high-performance, 12 output differential LVPECL fanout buffer. The device is designed for the fanout of high-frequency, very low additive phase-noise clock and data signals. The IDT8SLVP1212I is characterized to operate from a 3.3V and 2.5V power supply. Guaranteed output-to-output and part-to-part skew characteristics make the IDT8SLVP1212I ideal for those clock distribution applications demanding well-defined performance and repeatability. Two selectable differential inputs and twelve low skew outputs are available. The integrated bias voltage generators enables easy interfacing of single-ended signals to the device inputs. The device is optimized for low power consumption and low additive phase noise. Block Diagram PCLK0 nPCLK0 VCC PCLK1 nPCLK1 VCC fREF SEL VREF Voltage Reference Q0 nQ0 Q1 nQ1 Q2 nQ2 Q3 nQ3 Q4 nQ4 Q5 nQ5 Q6 nQ6 Q7 nQ7 Q8 nQ8 ...