IS42S32160F

IS42R32160F, IS45R32160F IS42S32160F, IS45S32160F 16Mx32, 512Mb SDRAM NOVEMBER 2015 FEATURES Clock frequency: 166, 143 MHz Fully synchronous; all signals referenced to a positive clock edge Internal bank for hiding row access/precharge Power supply: Vdd/Vddq = 2.3V-3.6V IS42/45S32160F - Vdd/Vddq = 3.3V IS42/45R32160F - Vdd/Vddq = 2.5 LVTTL interface Programmable burst length – (1, 2, 4, 8, full page) Programmable burst sequence: Sequential/Interleave Auto Refresh (CBR) Self Refresh 8K refresh cycles every 64 ms Random column address every clock cycle Programmable CAS latency (2, 3 clocks) Burst read/write and burst read/single write operations capability Burst termination by burst stop and precharge command Packages: 90-ball TF-BGA, 86-pin TSOP-ll Temperature Range: Commercial (0oC to +70oC) Industrial (-40oC to +85oC) Automotive, A1 (-40oC to +85oC) Automotive, A2 (-40oC to +105oC) device OVERVIEW ISSI's 512Mb Synchronous DRAM achieves high-speed data transfer using pipeline architecture. All inputs and outputs signals refer to the rising edge of the clock input. The 512Mb SDRAM is organized as follows. PACKAGE INFORMATION IS42/45S32160F IS42/45R32160F 4M x 32 x 4 banks 90-ball TF-BGA 86-pin TSOP-ll KEY TIMING PARAMETERS Parameter Clk Cycle Time CAS Latency = 3 CAS Latency = 2 Clk Frequency CAS Latency = 3 CAS Latency = 2 Access Time from Clock CAS Latency = 3 CAS Latency = 2 -6 -7 6 7 10 10 167 143 100 100 5.4 5.4 6 6 -75E ...