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IS61WV3216BLL Datasheet

Part Number IS61WV3216BLL
Manufacturers ISSI
Logo ISSI
Description (IS61WV3216BLL / IS64WV3216BLL) 32K x 16 HIGH-SPEED CMOS STATIC RAM
Datasheet IS61WV3216BLL DatasheetIS61WV3216BLL Datasheet (PDF)

www.DataSheet4U.com IS64WV3216BLL IS61WV3216BLL 32K x 16 HIGH-SPEED CMOS STATIC RAM ISSI NOVEMBER 2005 ® FEATURES • High-speed access time: 12 ns: 3.3V + 10% 15 ns: 2.5V-3.6V • CMOS low power operation: 50 mW (typical) operating 25 µW (typical) standby • TTL compatible interface levels • Fully static operation: no clock or refresh required • Three state outputs • Data control for upper and lower bytes • Automotive Temperature Available • Lead-free available DESCRIPTION The ISSI IS61/64WV321.

  IS61WV3216BLL   IS61WV3216BLL






(IS61WV3216BLL / IS64WV3216BLL) 32K x 16 HIGH-SPEED CMOS STATIC RAM

www.DataSheet4U.com IS64WV3216BLL IS61WV3216BLL 32K x 16 HIGH-SPEED CMOS STATIC RAM ISSI NOVEMBER 2005 ® FEATURES • High-speed access time: 12 ns: 3.3V + 10% 15 ns: 2.5V-3.6V • CMOS low power operation: 50 mW (typical) operating 25 µW (typical) standby • TTL compatible interface levels • Fully static operation: no clock or refresh required • Three state outputs • Data control for upper and lower bytes • Automotive Temperature Available • Lead-free available DESCRIPTION The ISSI IS61/64WV3216BLL is a high-speed, 524,288-bit static RAM organized as 32,768 words by 16 bits. It is fabricated using ISSI 's high-performance CMOS technology. This highly reliable process coupled with innovative circuit design techniques, yields access times as fast as 12ns (3.3V + 10%) and 15ns (2.5V-3.6V) with low power consumption. When CE is HIGH (deselected), the device assumes a standby mode at which the power dissipation can be reduced down with CMOS input levels. Easy memory expansion is provided by using Chip Enable and Output Enable inputs, CE and OE. The active LOW Write Enable (WE) controls both writing and reading of the memory. A data byte allows Upper Byte (UB) and Lower Byte (LB) access. DataShee The IS61/64WV3216BLL is packaged in the JEDEC stanDataSheet4U.com dard 44-pin TSOP-II, and 48-pin mini BGA (6mm x 8mm). FUNCTIONAL BLOCK DIAGRAM A0-A14 DECODER 32K x 16 MEMORY ARRAY VDD GND I/O0-I/O7 Lower Byte I/O8-I/O15 Upper Byte I/O DATA CIRCUIT COLUMN I/O CE OE WE UB LB CONTR.


2006-08-16 : UPC814C    UPC814    LTC4053-4.2    IS64WV102416BLL    IS61WV102416BLL    IS61WV102416ALL    IS64WV1024BLL    IS63WV1024BLL    IS64WV12816BLL    IS61WV12816BLL   


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