IS62/65WV2568DALL IS62/65WV2568DBLL
256K x 8 LOW VOLTAGE,
JUNE 2013
ULTRA LOW POWER CMOS STATIC RAM ...
IS62/65WV2568DALL IS62/65WV2568DBLL
256K x 8 LOW
VOLTAGE,
JUNE 2013
ULTRA LOW POWER
CMOS STATIC RAM
FEATURES High-speed access time: 35ns, 45ns, 55ns
CMOS low power operation – 36 mW (typical) operating – 9 µW (typical)
CMOS standby TTL compatible interface levels Single power supply – 1.8V ± 10% Vcc (IS62/65WV2568DALL) – 2.5V–3.6V Vcc (IS62/65WV2568DBLL) Fully static operation: no clock or refresh
required Three state outputs Industrial temperature available Lead-free available
DESCRIPTION
The ISSI IS62/65WV2568DALL and IS62/65WV2568DBLL
are high-speed, 2M bit static RAMs organized as
256K words by 8 bits. It is fabricated using ISSI's high-
performance
CMOS technology.This highly reliable process coupled with innovative circuit design techniques, yields high-performance and low power consumption devices.
When CS1 is HIGH (deselected) or when CS2 is low (deselected) , the device assumes a standby mode at which the power dissipation can be reduced down with
CMOS input levels.
Easy memory expansion is provided by using Chip Enable and Output Enable inputs. The active LOW Write Enable (WE) controls both writing and reading of the memory.
The IS62/65WV2568DALL and IS62/65WV2568DBLL are packaged in the JEDEC standard 32-pin TSOP (TYPE I), sTSOP (TYPE I), and 36-pin mini BGA.
FUNCTIONAL BLOCK DIAGRAM
A0-A17
VCC GND
I/O0-I/O7
DECODER
I/O DATA CIRCUIT
256K x 8 MEMORY ARRAY
COLUMN I/O
CS2 CS1
OE WE
CONTROL CIRCUIT
...