www.DataSheet4U.com
PRELIMINARY PRELIMINARY
CMOS SRAM
K6R1004C1C-C/C-L, K6R1004C1C-I/C-P
Document Title
256Kx4 Bit (wi...
www.DataSheet4U.com
PRELIMINARY PRELIMINARY
CMOS SRAM
K6R1004C1C-C/C-L, K6R1004C1C-I/C-P
Document Title
256Kx4 Bit (with OE) High-Speed
CMOS Static RAM(5.0V Operating).
Revision History
Rev. No. Rev. 0.0 Rev. 1.0 History Initial release with Preliminary. Release to Final Data Sheet. 1.1. Delete Preliminary. Add 10ns & Low Power Ver. Delete 20ns speed bin Draft Data Aug. 5. 1998 Mar. 3. 1999 Remark Preliminary Final
Rev. 2.0 Rev. 3.0
Apr. 24. 2000 Sep. 24. 2001
Final Final
The attached data sheets are prepared and approved by SAMSUNG Electronics. SAMSUNG Electronics CO., LTD. reserve the right to change the specifications. SAMSUNG Electronics will evaluate and reply to your requests and questions on the parameters of this device. If you have any questions, please contact the SAMSUNG branch office near your office, call or contact Headquarters.
-1-
Revision 3.0 September 2001
PRELIMINARY PRELIMINARY
K6R1004C1C-C/C-L, K6R1004C1C-I/C-P
256K x 4 Bit (with OE) High-Speed
CMOS Static RAM
FEATURES
Fast Access Time 10,12,15ns(Max.) Low Power Dissipation Standby (TTL) : 30mA(Max.) (
CMOS) : 5mA(Max.) 0.5mA(Max.) L-Ver. only Operating K6R1004C1C-10 : 75mA(Max.) K6R1004C1C-12 : 70mA(Max.) K6R1004C1C-15 : 68mA(Max.) Single 5.0V±10% Power Supply TTL Compatible Inputs and Outputs I/O Compatible with 3.3V Device Fully Static Operation - No Clock or Refresh required Three State Outputs 2V Minimum Data Retention: L-ver. only Center Power/Ground Pin Configuration St...