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K6R1008C1C-C10

Samsung semiconductor

128Kx8 Bit High-Speed CMOS Static RAM(5V Operating). Operated at Commercial and Industrial Temperature Ranges.

PRELIMINARY K6R1008C1C-C/C-L, K6R1008C1C-I/C-P Document Title 128Kx8 Bit High-Speed CMOS Static RAM(5V Operating). Opera...


Samsung semiconductor

K6R1008C1C-C10

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Description
PRELIMINARY K6R1008C1C-C/C-L, K6R1008C1C-I/C-P Document Title 128Kx8 Bit High-Speed CMOS Static RAM(5V Operating). Operated at Commercial and Industrial Temperature Ranges. CMOS SRAM Revision History Rev. No. Rev. 0.0 Rev. 1.0 History Initial release with Preliminary. Release to Final Data Sheet. 1.1. Delete Preliminary. 2.2. Added Data Retention Characteristics. Add 10ns part. Delete 20ns speed bin Draft Data Aug. 5. 1998 Mar. 3. 1999 Remark Preliminary Final Rev. 2.0 Rev. 3.0 Mar. 3. 2000 Sep. 24. 2001 Final Final The attached data sheets are prepared and approved by SAMSUNG Electronics. SAMSUNG Electronics CO., LTD. reserve the right to change the specifications. SAMSUNG Electronics will evaluate and reply to your requests and questions on the parameters of this device. If you have any questions, please contact the SAMSUNG branch office near your office, call or contact Headquarters. -1- Revision 3.0 September 2001 PRELIMINARY K6R1008C1C-C/C-L, K6R1008C1C-I/C-P FEATURES Fast Access Time 10,12,15ns(Max.) Low Power Dissipation Standby (TTL) : 30mA(Max.) (CMOS) : 5mA(Max.) 0.5mA(Max.) L-ver. only Operating K6R1008C1C-10 : 80mA(Max.) K6R1008C1C-12 : 75mA(Max.) K6R1008C1C-15 : 73mA(Max.) Single 5.0V±10% Power Supply TTL Compatible Inputs and Outputs I/O Compatible with 3.3V Device Fully Static Operation - No Clock or Refresh required Three State Outputs 2V Minimum Data Retention: L-ver. only Center Power/Ground Pin Configuration Standard Pin Configu...




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