L6316

www.DataSheet4U.com L6316 4-CHANNEL LOW POWER PREAMPLIFIER DATA BRIEF 1 ■ ■ FEATURES Dual Power Supplies of +5V, 10% and -3v, 6% Low Power consumption; 980 mW @ 800Mb/s (Single Head 100% Write mode duty cycle, Random pattern, Iw = 40mA, Max Ovs). Flip Chip package.L6316 Differential Voltage Bias / Voltage Sense architecture. Current Bias available Programmable read input differential impedance. Selectable read path bandwidth from 200 to >600 MHz (Rmr=40Ω). (Parameter dependent on interconnect) Selectable LF corner (1, 2.5, 3.5 or 5.5 MHz with RMR=40Ω). Noise Figure of merit; 2.2 dB (Rmr=40Ω) MR bias voltage programmable from 70 to 225 mV nom. (5 bits) (7.2mA max). MR bias current programmable from 0.65 to 7.2 mA nom. (5 bits) (225mV max). Read input stage optimized for MR resistance from 20 to 70 Ohm. Programmable read voltage gain of 37, 40, 43, 46 dB Rmr = 40Ω, Rload = 100Ω Fully Differential write driver: Programmable overshoot amplitude (3bits) and duration (2bits). Write current rise/fall time with custom head and interconnect model 140 pS at 40 mA (10% to 90%) (Steady state to steady state) Write current amplitude programmable (5 bits) 0 to 62 mA (0-pk). Bi-directional 16-bit serial interface 2.5V and 3.3V CMOS compatible. 2-pin (RXW and TFI), 2 bits mode selection (WAKE, ENTFI). All control signals are 2.5 & 3.3V CMOS compatible. Analog buffered head voltage ABHV (gain of 5) Automatic digital MR resistance measurement (7 bits). Read head open detection, Read head sh...