NANDSchmitt-Trigger. L74VHC1G135 Datasheet

L74VHC1G135 Datasheet PDF


Part L74VHC1G135
Description 2-Input NANDSchmitt-Trigger
Feature LESHAN RADIO COMPANY, LTD. 2-Input NANDSchmitt-Trigger with Open Drain Output L74 VHC1G135 The L74VH.
Manufacture LRC
Datasheet
Download L74VHC1G135 Datasheet


LESHAN RADIO COMPANY, LTD. 2-Input NANDSchmitt-Trigger with L74VHC1G135 Datasheet




L74VHC1G135
LESHAN RADIO COMPANY, LTD.
2-Input NANDSchmitt-Trigger with
Open Drain Output
L74 VHC1G135
The L74VHC1G135 is a single gate CMOS Schmitt NAND trigger with an open drain output fabricated with silicon gate CMOS
technology. It achieves high speed operation similar to equivalent Bipolar Schottky TTL while maintaining CMOS low power dissipation.
The internal circuit is composed of three stages, including an open drain output which provides the capability to set the output switching
level. This allows the L74VHC1G135 to be used to interface 5V circuits to circuits of any voltage between V CC and 7 V using an external
resistor and power supply.
The L74VHC1G135 input structure provides protection when voltages up to 7 V are applied, regardless of the supply voltage.
The L74VHC1G135 can be used to enhance noise immunity or to square up slowly changing waveforms.
• High Speed: t PD = 4.9 ns (Typ) at V CC = 5 V
• Low Internal Power Dissipation: I CC = 2 mA (Max) at T A = 25°C
• Power Down Protection Provided on Inputs
• Pin and Function Compatible with Other Standard Logic Families
5
4
1
2
3
SC–88A/SOT–353/SC–70
DF SUFFIX
5
4
1
2
3
TSOP–5/SOT–23/SC–59
DT SUFFIX
MARKING DIAGRAMS
VZd
Pin 1
d = Date Code
VZd
Pin 1
d = Date Code
Figure 1. Pinout (Top View)
Figure 2. Logic Symbol
PIN ASSIGNMENT
1 IN B
2 IN A
3 GND
4 OUT Y
5 VCC
FUNCTION TABLE
Inputs
AB
LL
LH
HL
HH
Output
Y
Z
Z
Z
L
ORDERING INFORMATION
See detailed ordering and shipping information in the
package dimensions section on page 5 of this data sheet.
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L74VHC1G135
LESHAN RADIO COMPANY, LTD.
L74VHC1G135
MAXIMUM RATINGS
Symbol
Parameter
Value
Unit
V CC
V IN
V OUT
I IK
I OK
I OUT
I CC
PD
θ JA
TL
TJ
T stg
DC Supply Voltage
DC Input Voltage
DC Output Voltage
Input Diode Current
Output Diode Current
DC Output Current, per Pin
V < GND; V > V
OUT
OUT
CC
DC Supply Current, V CC and GND
Power dissipation in still air
SC–88A, TSOP–5
Thermal resistance
SC–88A, TSOP–5
Lead Temperature, 1 mm from Case for 10 s
Junction Temperature Under Bias
Storage temperature
– 0.5 to + 7.0
– 0.5 to +7.0
– 0.5 to +7.0
–20
+20
+ 25
+50
200
333
260
+ 150
–65 to +150
V
V
V
mA
mA
mA
mA
mW
°C/W
°C
°C
°C
V ESD
ESD Withstand Voltage
Human Body Model (Note 2)
Machine Model (Note 3)
>2000
> 200
V
Charged Device Model (Note 4)
N/A
I LATCH–UP
Latch–Up Performance Above V CC and Below GND at 125°C (Note 5)
± 500
mA
1. Maximum Ratings are those values beyond which damage to the device may occur. Exposure to these conditions or conditions
beyond those indicated may adversely affect device reliability. Functional operation under absolute–maximum–rated conditions is
not implied. Functional operation should be restricted to the Recommended Operating Conditions.
2. Tested to EIA/JESD22–A114–A
3. Tested to EIA/JESD22–A115–A
4. Tested to JESD22–C101–A
5. Tested to EIA/JESD78
RECOMMENDED OPERATING CONDITIONS
Symbol
Parameter
V CC DC Supply Voltage
V IN DC Input Voltage
V OUT
DC Output Voltage
T A Operating Temperature Range
t r ,t f
Input Rise and Fall Time
V CC = 3.3 ± 0.3 V
V CC = 5.0 ± 0.5 V
DEVICE JUNCTION TEMPERATURE VERSUS
TIME TO 0.1% BOND FAILURES
Junction
Time,
Time,
Temperature °C
Hours
Years
80
1,032,200
117.8
90
419,300
47.9
100
178,700
20.4
110
79,600
9.4
120
37,000
4.2
130
17,800
2.0
140
8,900
1.0
1
1
Min Max Unit
2.0 5.5 V
0.0 5.5 V
0.0 7.0 V
– 55
+ 125
°C
0 100 ns/V
0 20
10 100
TIME, YEARS
Figure 3. Failure Rate vs. Time
Junction Temperature
1000
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