LP621024E

Document Title 128K X 8 BIT CMOS SRAM Revision History Rev. No. 0.0 1.0 History Initial issue Final version release LP621024E Series 128K X 8 BIT CMOS SRAM Issue Date August 20, 2008 September 21, 2010 Remark Preliminary Final (September, 2010, Version 1.0) AMIC Technology, Corp. LP621024E Series 128K X 8 BIT CMOS SRAM Features „ Single +5V power supply „ Access times: 55/70 ns (max.) „ Current: Very low power version: Operating: 70mA (max.) Standby: 25μA (max.) „ Full static operation, no clock or refreshing required „ All inputs and outputs are directly TTL-compatible „ Common I/O using three-state output „ Output enable and two chip enable inputs for easy application „ Data retention voltage: 2V (min.) „ Available in 32-pin SOP, TSOP and TSSOP (8 X 13.4mm) packages „ Pb-Free package only „ All Pb-free (Lead-free) products are RoHS compliant General Description The LP621024E is a low operating current 1,048,576-bit static random access memory organized as 131,072 words by 8 bits and operates on a single 5V power supply. Inputs and three-state outputs are TTL compatible and allow for direct interfacing with common system bus structures. Two chip enable inputs are provided for POWER-DOWN and device enable and an output enable input is included for easy interfacing. Data retention is guaranteed at a power supply voltage as low as 2V. Product Family Product Family Operating Temperature LP621024E 0°C ~ +70°C VCC Range Speed 4.5V~5.5V 55ns / 70ns Power Dissip...