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LPC832M101FDH20 Datasheet

Part Number LPC832M101FDH20
Manufacturers NXP
Logo NXP
Description 32-bit ARM Cortex-M0+ microcontroller
Datasheet LPC832M101FDH20 DatasheetLPC832M101FDH20 Datasheet (PDF)

LPC83x 32-bit ARM® Cortex®-M0+ microcontroller; up to 32 KB flash and 4 KB SRAM; 12-bit ADC Rev. 1.2 — 4 April 2018 Product data sheet 1. General description The LPC83x are an ARM Cortex-M0+ based, low-cost 32-bit MCU family operating at CPU frequencies of up to 30 MHz. The LPC83x support up to 32 KB of flash memory and 4 KB of SRAM. The peripheral complement of the LPC83x includes a CRC engine, one I2C-bus interface, one USART, up to two SPI interfaces, one multi-rate timer, self-wake-up ti.

  LPC832M101FDH20   LPC832M101FDH20






32-bit ARM Cortex-M0+ microcontroller

LPC83x 32-bit ARM® Cortex®-M0+ microcontroller; up to 32 KB flash and 4 KB SRAM; 12-bit ADC Rev. 1.2 — 4 April 2018 Product data sheet 1. General description The LPC83x are an ARM Cortex-M0+ based, low-cost 32-bit MCU family operating at CPU frequencies of up to 30 MHz. The LPC83x support up to 32 KB of flash memory and 4 KB of SRAM. The peripheral complement of the LPC83x includes a CRC engine, one I2C-bus interface, one USART, up to two SPI interfaces, one multi-rate timer, self-wake-up timer, and SCTimer/PWM, a DMA, one 12-bit ADC, function-configurable I/O ports through a switch matrix, an input pattern match engine, and up to 29 general-purpose I/O pins. For additional documentation related to the LPC83x parts, see Section 18. 2. Features and benefits  System:  ARM Cortex-M0+ processor (revision r0p1), running at frequencies of up to 30 MHz with single-cycle multiplier and fast single-cycle I/O port.  ARM Cortex-M0+ built-in Nested Vectored Interrupt Controller (NVIC).  System tick timer.  AHB multilayer matrix.  Serial Wire Debug (SWD) with four break points and two watch points. JTAG boundary scan (BSDL) supported.  Macro Trace Buffer (MTB).  Memory:  Up to 32 KB on-chip flash programming memory with 64 Byte page write and erase. Code Read Protection (CRP) supported.  4 KB SRAM.  ROM API support:  Boot loader.  Flash In-Application Programming (IAP) and In-System Programming (ISP).  Digital peripherals:  High-speed GPIO interface connected to the ARM.


2021-10-15 : LPC811    LPC810    LPC834M101FHI33    LPC812    LPC832M101FDH20    LPC834    LPC832    RX63T   


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