M36L0T7050T2

www.DataSheet4U.com M36L0T7050T2 M36L0T7050B2 128 Mbit (Multiple Bank, Multi-Level, Burst) Flash memory and 32 Mbit (2Mb x16) PSRAM, Multi-Chip Package Preliminary Data Feature summary ■ Multi-Chip Package – 1 die of 128 Mbit (8Mb x16, Multiple Bank, Multi-level, Burst) Flash Memory – 1 die of 32 Mbit (2Mb x16) Pseudo SRAM Supply voltage – VDDF = 1.7 to 1.95V – VCCP = VDDQ = 2.7 to 3.1V – VPPF = 9V for fast program Electronic signature – Manufacturer Code: 20h – Device Code (Top Flash Configuration) M36L0T7050T2: 88C4h – Device Code (Bottom Flash Configuration) M36L0T7050B2: 88C5h ECOPACK® packages available ■ ■ FBGA ■ TFBGA88 (ZAQ) 8 x 10mm ■ ■ Block locking – All blocks locked at power-up – Any combination of blocks can be locked with zero latency – WP for Block Lock-Down – Absolute Write Protection with VPP = VSS Security – 64 bit unique device number – 2112 bit user programmable OTP Cells Common Flash Interface (CFI) 100,000 program/erase cycles per block Flash memory ■ Synchronous / Asynchronous Read – Synchronous Burst Read mode: 52MHz – Random Access: 85ns Synchronous Burst Read Suspend Programming time – 2.5µs typical Word program time using Buffer Enhanced Factory Program command Memory organization – Multiple Bank Memory Array: 8 Mbit Banks – Parameter Blocks (Top or Bottom location) Dual operations – program/erase in one Bank while read in others – No delay between read and write operations ■ ■ ■ ■ PSRAM ■ ■ ■ ■ ■ ■ Access time: 65ns 8-Word Page Acce...