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FUJITSU SEMICONDUCTOR DATA SHEET
DS05-50224-1E
Stacked MCP (Multi-Chip Package) FLASH MEMORY & FC...
www.DataSheet4U.com
FUJITSU SEMICONDUCTOR DATA SHEET
DS05-50224-1E
Stacked MCP (Multi-Chip Package) FLASH MEMORY & FCRAM
CMOS
64M (×16) Page FLASH MEMORY & 32M (×16) Mobile FCRAMTM
MB84VP23481FK-70
s FEATURES
Power Supply
Voltage of 2.7 V to 3.1 V High Performance 25 ns maximum page read access time, 65 ns maximum random access time (Flash) 20 ns maximum page read access time, 70 ns maximum random access time (FCRAM) Operating Temperature –30 °C to +85 °C Package 65-ball FBGA
(Continued)
s PRODUCT LINEUP
Flash
Supply
Voltage (V) Max Random Address Access Time (ns) Max Page Address Access Time (ns) Max CE Access Time (ns) Max OE Access Time (ns) VCCf* = 3.0 V 65 25 65 25
+0.1V –0.3 V
FCRAM
VCCr* = 3.0 V –0.3 V 70 20 70 40
+0.1V
*: Both VCCf and VCCr must be the same level when either part is being accessed.
s PACKAGE
65-ball plastic FBGA
(BGA-65P-M01)
MB84VP23481FK-70
(Continued)
— FLASH MEMORY Simultaneous Read/Write Operations (Dual Bank) FlexBankTM *1 Bank A: 8 Mbit (8 KB ×8 and 64 KB ×15) Bank B: 24 Mbit (64 KB ×48) Bank C: 24 Mbit (64 KB ×48) Bank D: 8 Mbit (8 KB ×8 and 64 KB ×15) 8 words Page Compatible with JEDEC-standard commands Uses same software commands as E2PROMs Minimum 100,000 Program/Erase Cycles Sector Erase Architecture Eight 8 Kbytes, a hundred twenty-six 64 Kbytes, eight 8 Kbytes sectors. Any combination of sectors can be concurrently erased. Also supports full chip erase Dual Boot Block Sixteen to 8Kbytes boot block sectors...