MOTOROLA
SEMICONDUCTOR TECHNICAL DATA
Dual 1-of-4 Decoder/ Demultiplexer
High–Performance Silicon–Gate CMOS
The MC54/7...
MOTOROLA
SEMICONDUCTOR TECHNICAL DATA
Dual 1-of-4 Decoder/ Demultiplexer
High–Performance Silicon–Gate
CMOS
The MC54/74HC139A is identical in pinout to the LS139. The device inputs are compatible with standard
CMOS outputs; with pullup resistors, they are compatible with LSTTL outputs. This device consists of two independent 1–of–4 decoders, each of which decodes a two–bit Address to one–of–four active–low outputs. Active–low Selects are provided to facilitate the demultiplexing and cascading functions. The demultiplexing function is accomplished by using the Address inputs to select the desired device output, and utilizing the Select as a data input. Output Drive Capability: 10 LSTTL Loads Outputs Directly Interface to
CMOS, NMOS and TTL Operating
Voltage Range: 2.0 to 6.0 V Low Input Current: 1.0 µA High Noise Immunity Characteristic of
CMOS Devices In Compliance with the Requirements Defined by JEDEC Standard No. 7A Chip Complexity: 100 FETs or 25 Equivalent Gates
MC54/74HC139A
J SUFFIX CERAMIC PACKAGE CASE 620–10
1
16
16 1
N SUFFIX PLASTIC PACKAGE CASE 648–08
16 1
D SUFFIX SOIC PACKAGE CASE 751B–05
ORDERING INFORMATION MC54HCXXXAJ MC74HCXXXAN MC74HCXXXAD Ceramic Plastic SOIC
LOGIC DIAGRAM PIN ASSIGNMENT
ADDRESS INPUTS A0a A1a 2 3 4 5 6 7 Y0a Y1a Y2a Y3a ACTIVE–LOW OUTPUTS SELECTa A0a A1a Y0a Y1a Y2a Y3a ADDRESS INPUTS A0b A1b 14 13 12 11 10 9 Y0b Y1b Y2b Y3b ACTIVE–LOW OUTPUTS GND 1 2 3 4 5 6 7 8 16 15 14 13 12 11 10 9 VCC SELECTb A0b A1b Y0b Y1b Y...
