MC9S08GT32A

www.DataSheet4U.com MC9S08GB60A MC9S08GB32A MC9S08GT60A MC9S08GT32A Data Sheet HCS08 Microcontrollers MC9S08GB60A Rev. 2 07/2008 freescale.com www.DataSheet4U.com www.DataSheet4U.com MC9S08GB60A Data Sheet Covers: MC9S08GB60A MC9S08GB32A MC9S08GT60A MC9S08GT32A MC9S08GB60A Rev. 2 07/2008 www.DataSheet4U.com Revision History To provide the most up-to-date information, the revision of our documents on the World Wide Web will be the most current. Your printed copy may be an earlier revision. To verify you have the latest information available, refer to: http://freescale.com The following revision history table summarizes changes contained in this document. Revision Number 1.00 1.01 Revision Date 07/14/2005 09/04/2007 Initial public release. Description of Changes Added a footnote to RTI of Table 3.2; Added RTI description to Section 3.5.6; Added a sentence "If active BDM mode is enabled in stop3, the internal RTI clock is not available." to the Section 5.7 Real Time Interrupt. Changed the Maximun Low Power of FBE and FEE in Table A-9 to 10 MHz. Changed the Title of Table 13-2 from “IIC1A Register Field Descriptions” to “IIC1F Register Field Descriptions” Added 42-pin SDIP information. Changed “However, when HGO=0, the maximum frequency is 8 MHz in FEE and FBE modes.” to “However, when HGO=0, the maximum frequency is 10 MHz in FEE and FBE modes.” in Appendix B5. Updated the “How to reach us” at backpage. 1.02 02/25/2008 2 7/30/2008 This product incorporates Sup...