MCU. MG86FE508 Datasheet

MG86FE508 Datasheet PDF

Part MG86FE508
Description 8051-Based MCU
Feature MG86FE508; 8051-Based MCU MG86FE/L508 Data Sheet Version: A1.3 This document contains information on a new pr.
Manufacture Megawin
Download MG86FE508 Datasheet

8051-Based MCU
Data Sheet
Version: A1.3
This document contains information on a new product under development by Megawin. Megawin reserves the right to change or
discontinue this product without notice.
Megawin Technology Co., Ltd. 2005 All rights reserved.
2015/05 version A1.3

MG86FE/L508 Data Sheet

1-T 80C51 Central Processing Unit
MG86FE/L508 with 8K Bytes flash ROM
ISP memory zone could be optioned as 0.5KB/1KB/1.5KB……
Flexible IAP size by software configured
Code protection for flash memory access
Flash write/erase cycle
For 0.5K IAP, the MTP of IAP write cycle is 2,000 times.
For 1.0K IAP, the MTP of IAP write cycle is 1,000 times
Flash data retention: 100 years at 25
MG86FE/L508 Flash space mapping (Default)
AP Flash6KB, 0000h~17FFh
IAP Flash1KB, 1800h~1BFFh
ISP Flash1KB, 1C00h~1FFFh)(ISP Boot code
On-chip 256 bytes scratch-pad RAM
Interrupt controller
8 sources, four-level-priority interrupt capability
Two external interrupt inputs, nINT0 and nINT1
The external interrupts support High/Low level or Rising/Falling edge trigger.
Two 16-bit timer/counters, Timer 0 and Timer 1.
T0CKO on P34 and T1CKO on P35
X12 mode enabled for Timer 0/1
Support PWM mode
Programmable prescaler for Timer 0 clock source
Programmable 16-bit counter/timer Array (PCA) with 4 channels PWM
Auto reload 16-bit base timer
2 compare/capture modules and 2 PWM modules
Capture mode
16-bit software timer mode
High speed output mode
Variable resolution PWM mode, up to 8-bit
Enhanced UART (S0)
Framing Error Detection
Automatic Address Recognition
Selectable clock polarity in mode 0
SPI master support in mode 4
Keypad Interrupt on 16 GPIOs
Two wire interface Start/Stop detection
8-bit ADC
Programmable throughput up to 200 ksps
8 channel single-ended inputs
Programmable Watchdog Timer, clock sourced from ILRCO
One time enabled by CPU or power-on
Interrupt CPU or Reset CPU on WDT overflow
Support WDT function in power down mode (watch mode)
0.5S ~ 64S programmable interrupt period
MG86FE/L508 Data Sheet

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