MK1574

I C R O C LOC K MK1574 Frame Rate Communications PLL Description The MK1574-01 is a Phase-Locked Loop (PLL) based clock synthesizer, which accepts an 8 kHz clock input as a reference, and generates many popular communications frequencies. All outputs are frequency locked together and to the input. This allows for the generation of locked clocks to the 8 kHz backplane clock, simplifying clock generation and distribution in communications systems. MicroClock can customize this device for any other different frequencies. Features Packaged in 16 pin narrow (150 mil) SOIC Exact multiplications stored in the device eliminate the need for external dividers Accepts 8 kHz input clock Output clock rates include T1, E1, T2, E2 3.0V to 5.5V operation Available in commercial (0 to +70 C) or industrial (-40 to +85 C) temperature ranges For jitter attenuation, use the MK2049 Block Diagram VDD GND 2 2 Output Buffer Output Buffer Output Buffer Output Buffer CLK1 CLK2 CLK3 8kHz (recovered) 4 FS0-3 8kHz Input Clock Input Buffer PLL Clock Synthesis and Control Circuitry CAP1 CAP2 1 Revision 011999 Printed 11/15/00 MicroClock Division of ICS 525 Race Street San Jose CA 95126(408)295-9800tel(408)295-9818fax MDS 1574-01 D I C R O C LOC K Pin Assignment ICLK VDD VDD CAP1 GND CAP2 GND FS0 1 2 3 4 5 6 7 8 16 15 14 13 12 11 10 9 FS3 N/C FS2 FS1 CLK3 CLK2 CLK1 8KOUT MK1574 Frame Rate Communications PLL Output Clocks Decoding Table MK1574-01 (MHz) Decode Address FS...