MM74HC08

MM74HC08 Quad 2-Input AND Gate September 1983 Revised December 1999 MM74HC08 Quad 2-Input AND Gate General Description The MM74HC08 AND gates utilize advanced silicon-gate CMOS technology to achieve operating speeds similar to LS-TTL gates with the low power consumption of standard CMOS integrated circuits. The HC08 has buffered outputs, providing high noise immunity and the ability to drive 10 LS-TTL loads. The 74HC logic family is functionally as well as pin-out compatible with the standard 74LS logic family. All inputs are protected from damage due to static discharge by internal diode clamps to VCC and ground. Features s Typical propagation delay: 7 ns (tPHL), 12 ns (tPLH) s Fanout of 10 LS-TTL loads s Quiescent power consumption: 2 µA maximum at room temperature s Low input current: 1 µA maximum Ordering Code: Order Number MM74HC08M MM74HC08SJ MM74HC08MTC MM74HC08N Package Number M14A M14D MTC14 N14A Package Description 14-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-120, 0.150” Wide 14-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide 14-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide 14-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300” Wide Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code. (Tape and Reel not available in N14A) Connection Diagram Top View © 1999 Fairchild Semiconductor Corporation DS005297 www.fairchildsemi.com MM74HC08 Absolute M...