MM74HC373 3-STATE Octal D-Type Latch
September 1983 Revised May 2005
MM74HC373 3-STATE Octal D-Type Latch
General Des...
MM74HC373 3-STATE Octal D-Type Latch
September 1983 Revised May 2005
MM74HC373 3-STATE Octal D-Type Latch
General Description
The MM74HC373 high speed octal D-type latches utilize advanced silicon-gate
CMOS technology. They possess the high noise immunity and low power consumption of standard
CMOS integrated circuits, as well as the ability to drive 15 LS-TTL loads. Due to the large output drive capability and the 3-STATE feature, these devices are ideally suited for interfacing with bus lines in a bus organized system.
When the LATCH ENABLE input is HIGH, the Q outputs will follow the D inputs. When the LATCH ENABLE goes LOW, data at the D inputs will be retained at the outputs until LATCH ENABLE returns HIGH again. When a high logic level is applied to the OUTPUT CONTROL input, all outputs go to a high impedance state, regardless of what signals are present at the other inputs and the state of the storage elements.
The 74HC logic family is speed, function, and pin-out compatible with the standard 74LS logic family. All inputs are protected from damage due to static discharge by internal diode clamps to VCC and ground.
Features
s Typical propagation delay: 18 ns s Wide operating
voltage range: 2 to 6 volts s Low input current: 1 PA maximum s Low quiescent current: 80 PA maximum (74 Series) s Output drive capability: 15 LS-TTL loads
Ordering Code:
Order Number Package Number
Package Description
MM74HC373WM
M20B
20-Lead Small Outline Integrated Circuit (SOIC), JEDEC ...