E2G0125-17-61
¡ Semiconductor MSM51V17405D/DSL
¡ Semiconductor
This version: Mar. 1998 MSM51V17405D/DSL
Pr el im in a...
E2G0125-17-61
¡ Semiconductor MSM51V17405D/DSL
¡ Semiconductor
This version: Mar. 1998 MSM51V17405D/DSL
Pr el im in ar y
4,194,304-Word ¥ 4-Bit DYNAMIC RAM : FAST PAGE MODE TYPE WITH EDO
DESCRIPTION
The MSM51V17405D/DSL is a 4,194,304-word ¥ 4-bit dynamic RAM fabricated in Oki's silicon-gate
CMOS technology. The MSM51V17405D/DSL achieves high integration, high-speed operation, and low-power consumption because Oki manufactures the device in a quadruple-layer polysilicon/ double-layer metal
CMOS process. The MSM51V17405D/DSL is available in a 26/24-pin plastic SOJ or 26/24-pin plastic TSOP. The MSM51V17405DSL (the self-refresh version) is specially designed for lower-power applications.
FEATURES
4,194,304-word ¥ 4-bit configuration Single 3.3 V power supply, ± 0.3 V tolerance Input : LVTTL compatible, low input capacitance Output : LVTTL compatible, 3-state Refresh : 2048 cycles/32 ms, 2048 cycles/128 ms (SL version) Fast page mode with EDO, read modify write capability CAS before RAS refresh, hidden refresh, RAS-only refresh capability CAS before RAS self-refresh capability (SL version) Multi-bit test mode capability Package options: 26/24-pin 300 mil plastic SOJ (SOJ26/24-P-300-1.27) (Product : MSM51V17405D/DSL-xxSJ) 26/24-pin 300 mil plastic TSOP (TSOPII26/24-P-300-1.27-K) (Product : MSM51V17405D/DSL-xxTS-K) xx indicates speed rank.
PRODUCT FAMILY
Family Access Time (Max.) tRAC tAA tCAC tOEA Cycle Time Power Dissipation (Min.) Operating (Max.) Sta...