MSM548512L

E2L0044-17-Y1 www.DataSheet4U.com ¡ Semiconductor ¡ Semiconductor MSM548512L 524,288-Word ¥ 8-Bit High-Speed PSRAM This version: Jan. 1998 MSM548512L Previous version: Dec. 1996 DESCRIPTION The MSM548512L is fabricated using OKI’s CMOS silicon gate process technology. This process, coupled with single-transister memory storage cells, permits maximum circuit density, minimum chip size and high speed. MSM548512L has Self-refresh mode in addition to Address-refresh mode and Auto-refresh mode. In the Self-refresh mode the internal refresh timer and address counter refresh the dynamic memory cells automatically. This series allows low power consumption when using standby mode with Self-refresh. The MSM548512L also features a static RAM-like write function that writes the data into the memory cell at the rising edge of WE. FEATURES Large capacity Fast access time Low power Refresh free Logic compatible Single power supply Refresh Package compatible Package options: 32-pin 600 mil plastic DIP 32-pin 525 mil plastic SOP : : : : : : : : 4-Mbit (524,288-word ¥ 8 bits) 80 ns max. 200 µA max. (standby with Self-refresh) Self refresh SRAM WE pin, no address multiplex 5 V ± 10% 2048 cycle/32 ms auto-address refresh SRAM standard package (DIP32-P-600-2.54) (Product : MSM548512L-xxRS) (SOP32-P-525-1.27-K) (Product : MSM548512L-xxGS-K) xx indicates speed rank. PRODUCT FAMILY Family MSM548512L-80RS MSM548512L-10RS MSM548512L-12RS MSM548512L-80GS-K MSM548512L-10GS-K MSM5...