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MSM5718B70 Datasheet

Part Number MSM5718B70
Manufacturers OKI electronic componets
Logo OKI electronic componets
Description 18-Megabit RDRAM (2M x 9)
Datasheet MSM5718B70 DatasheetMSM5718B70 Datasheet (PDF)

¡ Semiconductor MSM5718B70 ¡ Semiconductor 18-Megabit RDRAM (2M ¥ 9) MSM5718B70 E2G1033-17-54 DESCRIPTION The 18-Megabit Rambus™ DRAM (RDRAM™) is an extremely high-speed CMOS DRAM organized as 2M words by 9 bits. It is capable of bursting up to 256 bytes of data at less than 2 nanoseconds per byte. The use of Rambus Signaling Logic (RSL) technology makes transfer rates greater than 500 MHz achievable while using conventional system and board design methodologies. Lower effective latency is att.

  MSM5718B70   MSM5718B70






18-Megabit RDRAM (2M x 9)

¡ Semiconductor MSM5718B70 ¡ Semiconductor 18-Megabit RDRAM (2M ¥ 9) MSM5718B70 E2G1033-17-54 DESCRIPTION The 18-Megabit Rambus™ DRAM (RDRAM™) is an extremely high-speed CMOS DRAM organized as 2M words by 9 bits. It is capable of bursting up to 256 bytes of data at less than 2 nanoseconds per byte. The use of Rambus Signaling Logic (RSL) technology makes transfer rates greater than 500 MHz achievable while using conventional system and board design methodologies. Lower effective latency is attained by operating the dual 2KByte sense amplifiers as high speed caches, and by using random access mode to facilitate large block transfers. RDRAMs are general purpose high-performance memory devices suitable for use in a broad range of applications including PC and consumer main memory, graphics, video, and any other application where high-performance is required. FEATURES • Rambus Interface: Over 500 MB/sec peak transfer rate per RDRAM Rambus Signaling Logic (RSL) interface Synchronous protocol for fast block-oriented transfers Direct connection to Rambus ASICs, MPUs, and Peripherals 15 active signals require just 32 total pins on the controller interface (including power) 3.3 V operation Additional/multiple Rambus Channels provide an additional 500 MB/second band-width each • Dual 2KByte sense amplifiers may be operated as caches for low latency access • Random Access mode enables any burst order at full band width • Features for graphics include random-access mode, write-per-bit.


2006-01-05 : 74HC09    C5088    K1388    HA11226    PLS105    CDB8427    CDB8421    CDB8952    D8227    R711A   


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