MT9V131: 1/4-Inch SOC VGA CMOS Digital Image Sensor General Description
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General Description
This SO...
MT9V131: 1/4-Inch SOC VGA
CMOS Digital Image Sensor General Description
www.DataSheet4U.com
General Description
This SOC VGA
CMOS image sensor features DigitalClarity⎯Aptina’s breakthrough, lownoise
CMOS imaging technology that achieves CCD image quality (based on signal-tonoise ratio and low-light sensitivity) while maintaining the inherent size, cost, and integration advantages of
CMOS. The MT9V131 is a fully-automatic, single-chip camera, requiring only a power supply, lens, and clock source for basic operation. Output video is streamed through a parallel 8bit DOUT port, as shown in Figure 1. The output pixel clock is used to latch the data, while FRAME_VALID (FV) and LINE_VALID (LV) signals indicate the active video. The sensor can be put in an ultra-low power sleep mode by asserting the STANDBY pin. Output signals can also be tri-stated by de-asserting the OE_BAR pin. The MT9V131 internal registers can be configured using a two-wire serial interface. The MT9V131 can be programmed to output progressive scan images up to 30 fps in an 8-bit ITU_R BT.656 (YCbCr) formerly CCIR656, YUV, 565RGB, 555RGB, or 444RGB formats. 10-bit raw Bayer data output can also be selected. The FV and LV signals are output on dedicated pins, along with a pixel clock (PIXCLK) that is synchronous with valid data. Figure 1: Chip Block Diagram
SCLK SDATA SADDR CLK STANDBY OE_BAR VDD/DGND VAA/AGND VAA_PIX Communication Bus
Sensor Core
. Based on MT9V011
. 668H x 496V (VGA+ Reference) . 1/4-inch opti...