MX812

DATABULLETIN M X 8 1 2 VSR CODEC WITH DRAM CONTROL PRELIMINARY INFORMATION Features and Applications Half-Duplex Voice Storage and Retrieval Serial Bus µProcessor Control On-Chip DRAM Controller Up To 2 Minutes of High-Quality Recorded Audio Answering Functions and VoiceNotepad Low-Power 5-Volt CMOS Selectable Sample Rates and “Memory Size” MX812DW 28-pin SOIC MX812J 28-pin CDIP CLOCK AUDIO OUT VBIAS AUDIO IN EBIAS VDD VSS CHIP SELECT SERIAL CLOCK COMMAND DATA REPLY DATA IRQ CLOCK GENERATOR DEMOD CVSD CODEC MOD DRAM CONTROL POWER METER STATUS REGISTER SERIAL C-BUS INTERFACE and LOGIC STORE/PLAY/WAIT COMMAND BUFFER MODE REGISTER Figure 1 - MX812 Voice Store and Retrieve Codec WE CAS RAS1 A10/R2 A9 A8 EXTERNAL A7 DRAM A6 A5 1 or 2 x A4 1Mbit A3 DRAM Chips A2 A1 or A0 1 x D 4Mbit DRAM Chip DGND © 1997 MXCOM Inc. www.mxcom.com Tele: 800 638-5577 910 744-5050 Fax: 910 744-5054 Doc. # 20480076.003 4800 Bethania Station Road, Winston-Salem...