MX98704

INDEX www.DataSheet4U.com PRELIMINARY MX98704 100BASE-TX PHYSICAL DATA TRANSCEIVER 1.0 FEATURES Full-Duplex Operation Generates 125-Mhz Transmit Clock and 25-Mhz SYMCLK Converts 5-Bit Parallel Transmit Data to 1-Bit Serial Data Converts Transmit NRZ Data to NRZI Data Loopback and Transmitter-Off Modes Recovers 125-MHz Clock from Incoming serial NRZI Data Stream Reclocks Incoming Serial NRZI Data Stream Using Recovered Clock Converts Received Serial Bit Stream to 5-Bit Paralled Form Converts NRZI data to NRZ Generates 25-MHz Receive Clock Package type -52 PLCC -52 PQFP 2.0 GENERAL DESCRIPTION The 100Base-Tx Physical Data Transceiver (PDTR) includes the Physical Data Transmitter (PDT) and the Physical Data Receiver (PDR). The PDT converts encoded symbols into a serial NRZI data stream. The on-chip PLL generates a bit rate clock from the TCLKIN or crystal reference. The PDR uses a built-in clock recovery PLL to extract clock information from the received data stream. The recovered clock is used for serial-to-parallel data conversion. 2.1 FUNCTIONAL BLOCK DIAGRAM TDAT4-0 Input Register Shifter NRZ/ NRZI Output Control TDH, TDL SYMCLK TXEN XTAL1, XTAL2 TCLKIN 25 Mhz Crystal Oscillator Clock Multiplier (PLL) NRZ/ NRZI RDAT4-0 Output Register Shifter Media Interface RDH, RDL SDO RSCLK Divided by 5 Clock & Data Recovery (PLL) Clock Generator Control Logic MUX Normal Mode Test & Loopback Signal Detect SDI TEST LPBKB Data Transceiver Functions...