MXD1005

19-1309; Rev 0; 10/97 5-Tap Silicon Delay Line _______________General Description The MXD1005 silicon delay line offers five equally spaced taps with delays ranging from 12ns to 250ns and a nominal accuracy of ±2ns or ±3%, whichever is greater. Relative to hybrid solutions, this device offers enhanced performance and higher reliability, and reduces overall cost. Each tap can drive up to ten 74LS loads. The MXD1005 is available in multiple versions, each offering a different combination of delay times. It comes in the space-saving 8-pin µMAX package, as well as an 8-pin SO or DIP, allowing full compatibility with the DS1005 and other delay line products. ____________________________Features o Improved Second Source to DS1005 o Available in Space-Saving 8-Pin µMAX Package o 17mA Supply Current vs. Dallas’ 40mA o Low Cost o Delay Tolerance of ±2ns or ±3%, whichever is Greater o TTL/CMOS-Compatible Logic o Leading- and Trailing-Edge Accuracy o Custom Delays Available MXD1005 ________________________Applications Clock Synchronization Digital Systems ______________Ordering Information PART MXD1005C/D__ MXD1005PA__ MXD1005PD__ MXD1005SA__ MXD1005SE__ MXD1005UA__ TEMP. RANGE 0°C to +70°C -40°C to +85°C -40°C to +85°C -40°C to +85°C -40°C to +85°C -40°C to +85°C PIN-PACKAGE Dice* 8 Plastic DIP 14 Plastic DIP 8 SO 16 Narrow SO 8 µMAX _________________Pin Configurations TOP VIEW IN 1 TAP2 2 8 7 VCC TAP1 TAP3 TAP5 *Dice are tested at TA = +25°C. Note: To complete the ordering info...