Regulator. NCP164C Datasheet

NCP164C Datasheet PDF

Part NCP164C
Description LDO Regulator
Feature LDO Regulator, 300 mA, Low Dropout Voltage, Ultra Low Noise, High PSRR with Power Good NCP164C The .
Manufacture ON Semiconductor
Datasheet
Download NCP164C Datasheet





NCP164C
LDO Regulator, 300 mA,
Low Dropout Voltage, Ultra
Low Noise, High PSRR with
Power Good
NCP164C
The NCP164C is a 300 mA LDO, next generation of high PSRR,
ultralow noise and low dropout regulators with Power Good open
collector output. Designed to meet the requirements of RF and
sensitive analog circuits, the NCP164C device provides ultralow
noise, high PSRR and low quiescent current. The device also offer
excellent load/line transients. The NCP164C is designed to work with
a 1 mF input and a 1 mF output ceramic capacitor. It is available in
industry standard TSOP5, WDFN6 0.65P, 2 mm x 2 mm and
DFNW8 0.65P, 3 mm x 3 mm.
Features
Operating Input Voltage Range: 1.6 V to 5.0 V
Available in Fixed Voltage Option: 1.2 V to 4.5 V
Adjustable Version Reference Voltage: 1.1 V
±2% Accuracy Over Load and Temperature
Ultra Low Quiescent Current Typ. 30 mA
Standby Current: Typ. 0.1 mA
Very Low Dropout: 110 mV at 300 mA for 3.3 V Variant
Ultra High PSRR: Typ. 85 dB at 10 mA, f = 1 kHz
Ultra Low Noise: 9 mVRMS (Fixed Version)
Stable with a 1 mF Small Case Size Ceramic Capacitors
Available in – TSOP5 3 mm x 1.5 mm x 1 mm CASE 483
WDFN6 2 mm x 2 mm x 0.75 mm CASE 511BR
DFNW8 3 mm x 3 mm x 0.9 mm CASE 507AD
These Devices are PbFree, Halogen Free/BFR Free and are RoHS
Compliant
Typical Applications
Communication Systems
InVehicle Networking
Telematics, Infotainment and Clusters
General Purpose Automotive
www.onsemi.com
5
1
TSOP5
CASE 483
MARKING
DIAGRAMS
5
XXXAYWG
G
1
WDFN6 2x2, 0.65P
CASE 511BR
XXMG
G
1
DFNW8 3x3, 0.65P
CASE 507AD
P164
XXX
ALYWG
1
G
XXX
A
L
M
Y
W
G
= Specific Device Code
= Assembly Location
= Wafer Lot
= Month Code
= Year
= Work Week
= PbFree Package
(Note: Microdot may be in either location)
PIN CONNECTONS
OUT 1
6 IN
ADJ/SNS 2 GND 5 GND
PG 3
4 EN
WDFN6 2x2 mm
(Top View)
VIN
IN
OUT
CIN
1 mF
Ceramic
ON
OFF
NCP164C
EN GND PG
Figure 1. Typical Application Schematic
COUT
1 mF
Ceramic
ORDERING INFORMATION
See detailed ordering and shipping information on page 8 of
this data sheet.
© Semiconductor Components Industries, LLC, 2019
1
January, 2020 Rev. 1
Publication Order Number:
NCP164C/D



NCP164C
NCP164C
Table 1. PIN FUNCTION DESCRIPTION
Pin No.
TSOP5
Pin No.
WDFN6
Pin No.
DFNW8
Pin
Name
1
6
8
IN
5
1
1
OUT
3
4
7
EN
4/
3
3
PG
2
5
/4
2
2
6
GND
2
ADJ
2
SNS
4, 5
N/C
EPAD
EPAD
EPAD
Description
Input voltage supply pin
Regulated output voltage. The output should be bypassed with small 1 mF
ceramic capacitor
Chip enable: Applying VEN < 0.2 V disables the regulator, Pulling VEN > 0.7 V
enables the LDO
Power Good, open collector. Use 10 kW to 100 kW pullup resistor connected to
output or input voltage
Common ground connection
Adjustable output feedback pin (for adjustable version only)
Sense feedback pin.
Must be connected to OUT pin on PCB (for fixed versions only)
Not connected, pin can be tied to ground plane for better power dissipation
Expose pad should be tied to ground plane for better power dissipation
Table 2. ABSOLUTE MAXIMUM RATINGS
Rating
Symbol
Value
Unit
Input Voltage (Note 1)
VIN
0.3 to 5.3
V
Output Voltage
VOUT
0.3 to VIN+0.3, max. 5.3
V
Chip Enable Input
VCE
0.3 to 5.3
V
Power Good Voltage
VPG
0.3 to 5.3
V
Power Good Current
IPG
30
mA
Output Short Circuit Duration
tSC
unlimited
s
Maximum Junction Temperature
TJ
150
°C
Storage Temperature
TSTG
55 to 150
°C
ESD Capability, Human Body Model (Note 2)
ESDHBM
2000
V
ESD Capability, Charged Device Model (Note 2)
ESDCDM
1000
V
Stresses exceeding those listed in the Maximum Ratings table may damage the device. If any of these limits are exceeded, device functionality
should not be assumed, damage may occur and reliability may be affected.
1. Refer to ELECTRICAL CHARACTERISTIS and APPLICATION INFORMATION for Safe Operating Area.
2. This device series incorporates ESD protection and is tested by the following methods:
ESD Human Body Model tested per AECQ100002 (EIA/JESD22A114)
ESD Charged Device Model tested per EIA/JESD22C101, Field Induced Charge Model
www.onsemi.com
2




@ 2014 :: Datasheetspdf.com ::
Semiconductors datasheet search & download site (Privacy Policy & Contact)