September 1996
NDP7051L / NDB7051L N-Channel Logic Level Enhancement Mode Field Effect Transistor
General Description
T...
September 1996
NDP7051L / NDB7051L N-Channel Logic Level Enhancement Mode Field Effect Transistor
General Description
These logic level N-Channel enhancement mode power field effect transistors are produced using Fairchild's proprietary, high cell density, DMOS technology. This very high density process has been especially tailored to minimize on-state resistance, provide superior switching performance, and withstand high energy pulses in the avalanche and commutation modes. These devices are particularly suited for low
voltage applications such as automotive, DC/DC converters, PWM motor controls, and other battery powered circuits where fast switching, low in-line power loss, and resistance to transients are needed.
Features
67 A, 50 V. RDS(ON) = 0.0145 Ω @ VGS= 5 V RDS(ON) = 0.0115 Ω @ VGS= 10 V. Low drive requirements allowing operation directly from logic drivers. VGS(TH) < 2.0V. Rugged internal source-drain diode can eliminate the need for an external Zener diode transient suppressor. 175°C maximum junction temperature rating. High density cell design for extremely low RDS(ON). TO-220 and TO-263 (D2PAK) package for both through hole and surface mount applications.
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G
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Absolute Maximum Ratings
Symbol VDSS VDGR VGSS ID Parameter Drain-Source
Voltage
T C = 25°C unless otherwise noted
NDP7051L 50 50 ±16 ±25 67 200 130 0.87 -65 to 175
NDB7051L
Units V V V
Drain-Gate
Voltage (RGS < 1...