DatasheetsPDF.com

NDS355AN

ON Semiconductor

N-Channel Logic Level Enhancement Mode Field Effect Transistor

NDS355AN N-Channel Logic Level Enhancement Mode Field Effect Transistor General Description Features SuperSOTTM-3 N-C...


ON Semiconductor

NDS355AN

File Download Download NDS355AN Datasheet


Description
NDS355AN N-Channel Logic Level Enhancement Mode Field Effect Transistor General Description Features SuperSOTTM-3 N-Channel logic level enhancement mode power field effect transistors are produced using ON Semiconductor's proprietary, high cell density, DMOS technology. This very high density process is especially tailored to minimize on-state resistance. These devices are particularly suited for low voltage applications in notebook computers, portable phones, PCMCIA cards, and other battery powered circuits where fast switching, and low inline power loss are needed in a very small outline surface mount package. 1.7A, 30 V, RDS(ON) = 0.125 Ω @ VGS = 4.5 V RDS(ON) = 0.085 Ω @ VGS = 10 V. Industry standard outline SOT-23 surface mount package using proprietary SuperSOTTM-3 design for superior thermal and electrical capabilities. High density cell design for extremely low RDS(ON). Exceptional on-resistance and maximum DC current capability. Compact industry standard SOT-23 surface mount package. _______________________________________________________________________________ D Absolute Maximum Ratings TA = 25°C unless otherwise noted Symbol Parameter VDSS Drain-Source Voltage VGSS Gate-Source Voltage - Continuous ID Maximum Drain Current - Continuous - Pulsed PD Maximum Power Dissipation (Note 1a) (Note 1a) (Note 1b) TJ,TSTG Operating and Storage Temperature Range THERMAL CHARACTERISTICS RθJA Thermal Resistance, Junction-to-Ambient (Note 1a) RθJC Thermal Resista...




Similar Datasheet




@ 2014 :: Datasheetspdf.com :: Semiconductors datasheet search & download site. (Privacy Policy & Contact)