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NDS9936 Datasheet

Part Number NDS9936
Manufacturers Fairchild
Logo Fairchild
Description Dual N-Channel MOSFET
Datasheet NDS9936 DatasheetNDS9936 Datasheet (PDF)

February 1996 NDS9936 Dual N-Channel Enhancement Mode Field Effect Transistor General Description These N-Channel enhancement mode power field effect transistors are produced using Fairchild's proprietary, high cell density, DMOS technology. This very high density process is especially tailored to minimize on-state resistance and provide superior switching performance. These devices are particularly suited for low voltage applications such as DC/DC conversion, disk drive motor control, and oth.

  NDS9936   NDS9936






Part Number NDS9933A
Manufacturers Fairchild
Logo Fairchild
Description Dual P-Channel MOSFET
Datasheet NDS9936 DatasheetNDS9933A Datasheet (PDF)

NDS9933A January 1999 NDS9933A Dual P-Channel Enhancement Mode Field Effect Transistor General Description This P-Channel enhancement mode power field effect transistor is produced using Fairchild’s proprietary, high cell density, DMOS technology. This very high density process is especially tailored to minimize on-state resistance and provide superior switching performance. These devices are particularly suited for low voltage apllications such as DC motor control and DC/ DC conversion where .

  NDS9936   NDS9936







Dual N-Channel MOSFET

February 1996 NDS9936 Dual N-Channel Enhancement Mode Field Effect Transistor General Description These N-Channel enhancement mode power field effect transistors are produced using Fairchild's proprietary, high cell density, DMOS technology. This very high density process is especially tailored to minimize on-state resistance and provide superior switching performance. These devices are particularly suited for low voltage applications such as DC/DC conversion, disk drive motor control, and other battery powered circuits where fast switching, low in-line power loss, and resistance to transients are needed. Features 5A, 30V. RDS(ON) = 0.05Ω @ VGS = 10V. High density cell design for extremely low RDS(ON). High power and current handling capability in a widely used surface mount package. Dual MOSFET in surface mount package. ________________________________________________________________________________ 5 4 3 2 1 6 7 8 Absolute Maximum Ratings T A = 25°C unless otherwise noted Symbol VDSS VGSS ID Parameter Drain-Source Voltage Gate-Source Voltage Drain Current - Continuous @ TA = 25°C - Continuous @ TA = 70°C - Pulsed PD @ TA = 25°C Power Dissipation for Dual Operation Power Dissipation for Single Operation (Note 1a) (Note 1b) (Note 1c) (Note 1a) (Note 1a) NDS9936 30 ± 20 ± 5.0 ± 4.0 ± 40 2 1.6 1 0.9 -55 to 150 78 40 Units V V A W TJ,TSTG Operating and Storage Temperature Range Thermal Resistance, Junction-to-Ambient Thermal Resistance, Junction-to-Case °C °C/W °C/.


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