NS16C2752

www.DataSheet4U.com NS16C2552/NS16C2752 Dual UART with 16-byte/64-byte FIFO’s and up to 5 Mbit/s Data Rate PRELIMINARY August 2006 NS16C2552/NS16C2752 Dual UART with 16-byte/64-byte FIFO’s and up to 5 Mbit/s Data Rate 1.0 General Description The NS16C2552 and NS16C2752 are dual channel Universal Asynchronous Receiver/Transmitter (DUART). The footprint and the functions are compatible to the PC16552D, while new features are added to the UART device. These features include low voltage support, 5V tolerant inputs, enhanced features, enhanced register set, and higher data rate. The two serial channels are completely independent of each other, except for a common CPU interface and crystal input. On power-up both channels are functionally identical to the PC16552D. Each channel can operate with on-chip transmitter and receiver FIFO’s (in FIFO mode). In the FIFO mode each channel is capable of buffering 16 bytes (for NS16C2552) or 64 bytes (for NS16C2752) of data in both the transmitter and receiver. The receiver FIFO also has additional 3 bits of error data per location. All FIFO control logic is on-chip to minimize system software overhead and maximize system efficiency. To improve the CPU processing bandwidth, the data transfers between the DUART and the CPU can be done using DMA controller. Signaling for DMA transfers is done through two pins per channel (TXRDY and RXRDY). The RXRDY function is multiplexed on one pin with the OUT2 and BAUDOUT functions. The configuration is t...