CMOS Gate Array
2'47(0
®
$0,+* PLFURQ &026 *DWH $UUD\
Description
ODQTE60M is an enabled crystal oscillator, output driver pad ...
Description
2'47(0
®
$0,+* PLFURQ &026 *DWH $UUD\
Description
ODQTE60M is an enabled crystal oscillator, output driver pad piece that runs over a frequency range of 20 - 60 MHz. QI is the input from the IDQC3. E is the oscillator high input enable. PADM is the bond pad to Xtal-out.
Logic Symbol
Logic Schematic
ODQTE60M
E QI
PADM
QC E
P QC D
QO
E QI
ODQTE60M
Xtal-in
Xtal-out
Truth Table
PADM H H L
E L H H
QI X L H
Pin Loading
Load E 6.5 eql QI 5.5 eql
HDL Syntax
Verilog .................... ODQTE60M inst_name (PADM, E, QI); VHDL...................... inst_name: ODQTE60M port map (PADM, E, QI);
Power Characteristics
Parameter Static IDD (TJ = 85°C) EQLpd
See page 2-15 for power equation.
Value TBD 176.1
Units nA Eq-load
Pad Logic
4-33
2'47(0
®
$0,+* PLFURQ &026 *DWH $UUD\
Propagation Delays Conditions: TJ = 25°C, VDD = 5.0V, Typical Process
Delay (ns) From
To Parameter
15
E
PADM
tPLH tPHL
2.78 1.53
QI
PADM
tPLH tPHL
1.53 1.54
Delay will vary w...
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