P32M6416YA7

P16M648YA7, P32M6416YA7 P16M648YB7, P32M6416YB7 SDRAM MODULE P16M648YL(X)7, P32M6416YL(X)7 Features: PC-100 and PC133 Compatible JEDEC – Standard 168-pin , dual in-line memory Module (DIMM) TSOP components. Single 3.3v +.3v power supply. Nonbuffered fully synchronous; all signals measured on positive edge of system clock. Internal pipelined operation; column address can be changed every clock cycle. Quad internal banks for hiding row access/precharge. 64ms 4096 cycle refresh. All inputs, outputs, clocks LVTTL compatible. Options: 8 - 16Mx8 SDRAM TSOP 16 - 16Mx8 SDRAM TSOP Older Versions: 8 - 16Mx8 SDRAM TSOP 16 - 16Mx8 SDRAM TSOP Part Number: P16M648YA7 P32M6416YA7 Part Number: P16M648YB7 P32M6416YB7 KEY DIMM MODULE TIMING PARAMETERS Module Component Clock CAS Marking Marking Frequency Latency -8A -8A 100MHz 3 -75A -75A 133MHz 3 GENERAL DESCRIPTION The P16M648YA7 and P32M6416YA7 is a high performance dynamic random-access 256MB module, organized in a x64 configuration, and utilize quad bank architecture with a synchronous interface. All signals are registered on the positive edge of the clock signals CK0 through CK3. Read and write accesses to the SDRAM are burst oriented; accesses start at a location and continue for a programmed number of locations in a sequence. Accesses begin with an ACTIVE command, which is followed by a READ or WRITE command. _______________________________________________ ABSOLUTE MAXIMUM RATINGS: Voltage on Vcc Supply ...